Re: [PATCH v2 8/8] ARM: dts: qcom: Add Samsung Galaxy S4
Konrad Dybcio <[email protected]>
| Newsgroups | org.kernel.vger.phone-devel,dev.linux.lists.iommu,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-gpio,org.kernel.vger.linux-kernel |
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| Message-ID | <[email protected]> |
On 5/1/26 9:41 AM, MINETTE Alexandre wrote: > Thanks a lot for the suggestion, I checked the downstream board files > and it does not look like these buses are wired for GSBI. > > There, the MAX77693 bus is instantiated as a dedicated i2c-gpio bus on > GPIO 22/23, and the AN30259A LED bus as a dedicated i2c-gpio bus on > GPIO 6/7. The native APQ8064 GSBI2/GSBI3 I2C pins are different > (GPIO 24/25 and GPIO 8/9), so these two buses do not seem to be wired > to the GSBI controllers on jflte. What I meant is that the pins that the i2c-gpio nodes reference are actually wired (inside the SoC) to the GSBI I2C controllers. You'll notice that in drivers/pinctrl/qcom/pinctrl-apq8064.c, there are bits like: PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA), which mean "function 0 is GPIO [implicitly in the macro], function 1 is mux to the GSBI controller" Konrad