[PATCH 2/4] arm64: dts: qcom: milos: add OSM L3 node
Luca Weiss <[email protected]> Fri, 10 Jul 2026 11:22:40 +0200
| Newsgroups | org.kernel.vger.phone-devel,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pm |
|---|---|
| Message-ID | <[email protected]> |
Add the OSC L3 Cache controller node. Signed-off-by: Luca Weiss <[email protected]> --- arch/arm64/boot/dts/qcom/milos.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi index 8c9232988953..1172a4f6adab 100644 --- a/arch/arm64/boot/dts/qcom/milos.dtsi +++ b/arch/arm64/boot/dts/qcom/milos.dtsi @@ -2639,6 +2639,18 @@ rpmhpd_opp_turbo_l1: opp-416 { }; }; + epss_l3: interconnect@17d90000 { + compatible = "qcom,milos-epss-l3", "qcom,epss-l3"; + reg = <0x0 0x17d90000 0x0 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_GPLL0>; + clock-names = "xo", + "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@17d91000 { compatible = "qcom,milos-cpufreq-epss", "qcom,cpufreq-epss"; reg = <0x0 0x17d91000 0x0 0x1000>, -- 2.55.0