Re: [PATCH v7 0/1] Rust PCI capability infrastructure and SR-IOV support
Zhi Wang <[email protected]>
| Newsgroups | org.kernel.vger.rust-for-linux,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci |
|---|---|
| Message-ID | <20260813095452.2218a668@inno-dell> |
On Tue, 4 Aug 2026 19:16:10 +0300 Zhi Wang <[email protected]> wrote: Gentle ping. :) > This is a follow-up to v6 [10]. > > This patch has been used in the Boot GSP with vGPU enabled series [6]. > > The patch defines an ExtCapability trait that associates an extended > capability ID with its register layout. The generic > ConfigSpace::find_ext_capability() finder locates the capability, > bounds it at the next capability or the end of extended configuration > space, and projects the ConfigSpace view to the requested layout. It > returns None when the capability is absent and propagates errors > encountered while constructing the view. This lets the existing I/O > projection and access macros operate on capability registers. > > ExtSriovRegs provides the SR-IOV register layout. > ExtSriovCapability::vf_bars() validates the six raw VF BAR slots and > returns an iterator over logical BARs. The iterator handles the > different slot widths of 32-bit and 64-bit BARs internally and yields > decoded ExtSriovVfBar values containing the address and width. A > typed bitfield decodes each low DWORD while the register layout > remains an array of raw u32 values. ExtSriovCapability remains as a > convenience alias. > > Changes since v6: > - Changed ConfigSpace::find_ext_capability() to return > Result<Option<...>>, using None rather than ENODEV when the > capability is absent. (Gary) > - Made calculate_ext_cap_size() propagate errors instead of treating a > failed read as the end of capability. (Alex) > - Replaced indexed VF BAR access with an iterator so callers cannot > select the high DWORD of a 64-bit BAR. (Gary, Alex) > - Validated all six VF BAR slots before iteration, made normal > iterator exhaustion return None, and logged invalid BAR encodings > before returning EINVAL. (Gary) > - Decoded VF BAR low DWORDs through a typed bitfield while retaining > u32 in ExtSriovRegs for entries that may be 64-bit BAR high DWORDs. > (Alex) > - Made ExtSriovVfBar fields public and documented, removed their > trivial getters, used the ExtSriovCapability alias for its impl > block, and applied the suggested local cleanups. (Alex) > - Updated the doctest for the optional finder result and VF BAR > iterator. (Zhi) > - Added #[inline] to the ExtCapId::as_raw() abstraction method. > (Sashiko) > - Rebased onto the latest drm-rust-next. (Zhi) > > Changes since v5: > - Removed the unused ConfigSpace<Region<0>> offset() and size() > inherent methods; ConfigSpace already provides size through the Io > trait. (Sashiko, Zhi) > - Removed the doctest write to the SR-IOV NumVFs register, avoiding an > example that bypasses PCI core SR-IOV state management. (Sashiko) > - Corrected Function Dependency Link to an 8-bit field followed by its > reserved byte, matching the PCIe SR-IOV register layout. (Sashiko) > > Changes since v4: > - Replaced the separate is_vf_bar_64bit() and read_vf_bar64() helpers > with read_vf_bar(), returning a decoded ExtSriovVfBar. (Zhi) > - Moved memory BAR attribute stripping into the PCI abstraction and > used named PCI attribute definitions rather than an open-coded mask. > (Zhi) > - Exposed the next logical BAR slot so callers can walk mixed 32-bit > and 64-bit VF BAR layouts without duplicating slot arithmetic. (Zhi) > - Updated the doctest and PCI exports for the decoded BAR API. (Zhi) > > Changes since v3: > - Replaced the custom ExtCapability<T> I/O wrapper with the existing > ConfigSpace view infrastructure. (Alex) > - Reused ExtCapability as a trait carrying the capability ID, and made > ConfigSpace::find_ext_capability() generic over register layouts. > (Alex) > - Removed public cast_sized() and unused find_next_ext_capability(). > (Alex) > - Kept capability construction in the generic finder and documented > calculate_ext_cap_size(). (Alex) > - Used PCI_SRIOV_NUM_BARS rather than a literal VF BAR count. > (Alex, Zhi) > - Added is_vf_bar_64bit() and made read_vf_bar64() reject BARs that > are not 64-bit memory BARs. (Alex, Zhi) > - Kept indexed VF BAR helpers because the Nova user accesses fixed BAR > slots rather than iterating over them. (Alex) > - Adapted the implementation and doctest to the current ConfigSpace > I/O APIs. (Zhi) > > Changes since RFC v2: > - Hardened calculate_ext_cap_size() against corrupt capability lists. > (Zhi) > - Added // INVARIANT: comments at all ExtCapability construction sites > (make_ext_capability and cast_sized). (Zhi) > - Added #[inline] to small forwarding methods (find, read_vf_bar64). > (Zhi) > > Changes since RFC: > - Rebased on io_projection branch, using Gary's Io/IoCapable traits. > (Gary) > - ExtCapability implements Io and delegates IoCapable to ConfigSpace > instead of duplicating config read/write logic. (Gary) > - Dropped the fallible I/O patch (now upstream in this tree). (Zhi) > - Added Rust helper for PCI_EXT_CAP_NEXT() macro. (Zhi) > - Replaced raw `as` casts with From conversions where possible. (Zhi) > - Renamed SriovRegs/SriovCapability to > ExtSriovRegs/ExtSriovCapability. (Zhi) > > [1] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [2] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [3] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [4] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [5] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [6] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [7] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [8] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [9] > https://sashiko.dev/#/patchset/[email protected]?part=1 > [10] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [11] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [12] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [13] > https://lore.kernel.org/rust-for-linux/[email protected]/ > [14] > https://lore.kernel.org/linux-pci/[email protected]/ > > Zhi Wang (1): > rust: pci: add extended capability and SR-IOV support > > rust/helpers/pci.c | 5 + > rust/kernel/pci.rs | 8 ++ > rust/kernel/pci/cap.rs | 317 > +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 330 > insertions(+) create mode 100644 rust/kernel/pci/cap.rs > > > base-commit: 44e7e7f7cffb10a93bb88e7cb59b7b8b3e2deb1c