Re: [PATCH 1/3] sparc32: honour phys_base in the viking cache flush routines
Sam Ravnborg <[email protected]>
| Newsgroups | org.kernel.vger.sparclinux,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Hi Magnus. On Fri, Aug 14, 2026 at 12:52:32PM +0200, Magnus Lindholm wrote: > viking_flush_page() and viking_mxcc_flush_page() derive the physical > address of the page they are asked to flush by subtracting PAGE_OFFSET > from the kernel virtual address: > > sethi %hi(PAGE_OFFSET), %g2 > sub %o0, %g2, %g3 > > That is only the physical address when phys_base is zero. The C side spells > the same conversion __pa(), which adds phys_base, and every caller passes a > kernel virtual address expecting exactly that. > > With a kernel loaded away from the start of RAM the two disagree by > phys_base. viking_flush_page() then compares cache tags against the wrong > page and flushes nothing, and viking_mxcc_flush_page() streams a page that > is phys_base lower than the one it was given, so the intended lines stay > dirty in the cache while unrelated ones are pushed out. > > The visible effect is that anything relying on a flush to make memory > visible to another bus master silently keeps working from stale data. On a > SPARCstation 20 this shows up as every SCSI transfer failing with a DMA > error: iommu_flush_iotlb() cannot get the IOPTEs out to RAM, so the IOMMU > walks stale entries and the ESP DMA faults. > > Add phys_base, so these agree with __pa() again. No change when phys_base > is zero, which is why this went unnoticed. > > Signed-off-by: Magnus Lindholm <[email protected]> Looks good, I checked and as the other variants are coherent this should be the only place we need this. Reviewed-by: Sam Ravnborg <[email protected]>