Re: [PATCH] clk: qcom: ipq-cmn-pll: keep the CMN block bus clocks enabled

On Thu, Aug 20, 2026 at 01:39:52PM +0800, Jie Luo wrote:
> As far as I understand, there is no expectation that the CMN PLL
> registers need to be accessed after the CMN PLL driver has finished
> loading on IPQ5018.
>
> Could we identify which module is blocked after the CMN PLL driver probe
> completes?

I don't have a captured trace to point to — this was found through
code inspection, not a reproduced hang on hardware, and I'd rather
say that plainly than overstate it.

That said, "no expectation of post-probe access" isn't something CCF
enforces. debugfs (clk_summary and similar) can read back rate/state
for any registered clk at any time regardless of whether a formal
consumer exists, and nothing stops a future driver — including a
possible upstream UNIPHY driver — from calling clk_get_rate() or
clk_round_rate() on this provider later. Leaving the AHB/SYS
interface gated while the provider is still registered and
advertised as active seems fragile on those grounds alone, even
without a concrete stack trace in hand today.

If anyone on this thread has access to IPQ5018 hardware and can
force autosuspend then read back clk_summary for this provider,
that would settle it either way — I don't currently have access
to test this myself.

Reviewed-by: Mieczyslaw Nalewaj <[email protected]>