Re: [PATCH v3 47/51] accel/tcg: Use addr/last in tlb_flush_range_locked
Richard Henderson <[email protected]>
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel,org.nongnu.qemu-riscv |
|---|---|
| Message-ID | <[email protected]> |
On 7/16/26 12:13, Ilya Leoshkevich wrote: > On 7/10/26 22:53, Richard Henderson wrote: >> Change from addr/len to addr/last in the implementation. >> >> Signed-off-by: Richard Henderson <[email protected]> >> --- >> accel/tcg/cputlb.c | 71 +++++++++++++++++++++++++--------------------- >> 1 file changed, 38 insertions(+), 33 deletions(-) > >> @@ -733,7 +736,7 @@ static void tlb_flush_range_by_mmuidx_async_0(CPUState *cpu, >> * If the length is larger than the jump cache size, then it will take >> * longer to clear each entry individually than it will to clear it all. >> */ >> - if (d.len >= (TARGET_PAGE_SIZE * TB_JMP_CACHE_SIZE)) { >> + if (((d.last - d.addr) >> TARGET_PAGE_SIZE) + 1 >= TB_JMP_CACHE_SIZE) { > > >> TARGET_PAGE_SHIFT? Oops, thanks. r~