[PATCH 11/17] target/arm: Expand dczid_bs in DisasContext

Richard Henderson <[email protected]>
Newsgroups org.nongnu.qemu-arm,org.nongnu.qemu-devel
Message-ID <[email protected]>
Store the true blocksize, not the encoding.

Signed-off-by: Richard Henderson <[email protected]>
---
 target/arm/tcg/translate.h     | 4 ++--
 target/arm/tcg/translate-a64.c | 5 ++---
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index a3d03159ad..bab91eea22 100644
--- a/target/arm/tcg/translate.h
+++ b/target/arm/tcg/translate.h
@@ -197,14 +197,14 @@ typedef struct DisasContext {
      *  < 0, set by the current instruction.
      */
     int8_t btype;
-    /* A copy of DCZID_EL0.BS. */
-    uint8_t dcz_blocksize;
     /* A copy of cpu->gm_blocksize. */
     uint8_t gm_blocksize;
     /* True if the current insn_start has been updated. */
     bool insn_start_updated;
     /* FPMR access exception EL or 0 if enabled. */
     uint8_t fpmr_el;
+    /* An expansion of DCZID_EL0.BS. */
+    int dcz_blocksize;
     /* Offset from VNCR_EL2 when FEAT_NV2 redirects this reg to memory */
     uint32_t nv2_redirect_offset;
 } DisasContext;
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 1780490065..3d838a4cc1 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -4752,7 +4752,6 @@ static bool trans_LD_single_repl(DisasContext *s, arg_LD_single_repl *a)
 static bool trans_STZGM(DisasContext *s, arg_ldst_tag *a)
 {
     TCGv_i64 addr, clean_addr, tcg_rt;
-    int size = 4 << s->dcz_blocksize;
 
     if (!dc_isar_feature(aa64_mte, s)) {
         return false;
@@ -4777,7 +4776,7 @@ static bool trans_STZGM(DisasContext *s, arg_ldst_tag *a)
      * except the alignment happens before the access.
      */
     clean_addr = clean_data_tbi(s, addr);
-    tcg_gen_andi_i64(clean_addr, clean_addr, -size);
+    tcg_gen_andi_i64(clean_addr, clean_addr, -s->dcz_blocksize);
     gen_helper_dc_zva(tcg_env, clean_addr);
     return true;
 }
@@ -11055,7 +11054,7 @@ static void aarch64_tr_init_disas_context(DisasContextBase *dcbase,
     dc->vec_stride = 0;
     dc->cp_regs = arm_cpu->cp_regs;
     dc->features = env->features;
-    dc->dcz_blocksize = get_dczid_bs(arm_cpu);
+    dc->dcz_blocksize = 4 << get_dczid_bs(arm_cpu);
     dc->gm_blocksize = arm_cpu->gm_blocksize;
 
 #ifdef CONFIG_USER_ONLY
-- 
2.43.0
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