Re: [PATCH v5 01/10] hw/arm/ast27x0: Start SSP in powered-off state to match hardware behavior
Cédric Le Goater <[email protected]>
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
On 7/8/26 11:20, Jamin Lin wrote: > In the previous design, both the PSP and SSP were started together during > SoC initialization. However, on real hardware, the SSP begins in a powered-off > state. The typical boot sequence involves the PSP powering up first, loading > the SSP firmware binary into shared memory via DRAM remap, and then releasing > the SSP reset and enabling it through SCU control registers. > > To more accurately model this behavior in QEMU, this commit sets the > "start-powered-off" property for the SSP's ARMv7M core. This change ensures > the SSP remains off until explicitly enabled via the SCU, simulating the > real-world flow where the PSP controls SSP boot through SCU interaction. > > Signed-off-by: Jamin Lin <[email protected]> > --- > hw/arm/aspeed_ast27x0-ssp.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c > index e03653086c..9c984d23cd 100644 > --- a/hw/arm/aspeed_ast27x0-ssp.c > +++ b/hw/arm/aspeed_ast27x0-ssp.c > @@ -192,6 +192,13 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp) > qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk); > object_property_set_link(OBJECT(&a->armv7m), "memory", > OBJECT(s->memory), &error_abort); > + /* > + * The SSP starts in a powered-down state and can be powered up > + * by setting the SSP Control Register through the SCU > + * (System Control Unit) > + */ > + object_property_set_bool(OBJECT(&a->armv7m), "start-powered-off", true, > + &error_abort); > sysbus_realize(SYS_BUS_DEVICE(&a->armv7m), &error_abort); > > /* SDRAM */ Reviewed-by: Cédric Le Goater <[email protected]> Thanks, C.