[PATCH 2/4] target/arm: Add stub for define_gicv5_cpuif_regs()

The common helper.c file calls define_gicv5_cpuif_regs() which
is only defined when TCG is built:

  $ git grep -w define_gicv5_cpuif_regs
  target/arm/internals.h:1885:void define_gicv5_cpuif_regs(ARMCPU *cpu);
  target/arm/helper.c:6334:        define_gicv5_cpuif_regs(cpu);
  target/arm/tcg/gicv5-cpuif.c:923:void define_gicv5_cpuif_regs(ARMCPU *cpu)

This fixes when building on macOS with --disable-tcg:

  Undefined symbols for architecture arm64:
    "_define_gicv5_cpuif_regs", referenced from:
        _register_cp_regs_for_features in target_arm_helper.c.o

Define the GICv5 stubs in their own compilation unit, otherwise
we get the following error:

  duplicate symbol '_raise_exception_ra' in:
    libsystem_arm.a.p/target_arm_tcg_op_helper.c.o
    libstubs_arm.a[4](target_arm_tcg-stubs.c.o)

Fixes: ee0f1ce00db ("target/arm: GICv5 cpuif: Initial skeleton and GSB barrier insns")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
 target/arm/gicv5-stubs.c | 17 +++++++++++++++++
 target/arm/tcg-stubs.c   |  4 ----
 target/arm/meson.build   |  1 +
 3 files changed, 18 insertions(+), 4 deletions(-)
 create mode 100644 target/arm/gicv5-stubs.c

diff --git a/target/arm/gicv5-stubs.c b/target/arm/gicv5-stubs.c
new file mode 100644
index 00000000000..845626d7c6b
--- /dev/null
+++ b/target/arm/gicv5-stubs.c
@@ -0,0 +1,17 @@
+/*
+ * QEMU ARM stubs for GICv5 TCG helper functions
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "internals.h"
+
+void define_gicv5_cpuif_regs(ARMCPU *cpu)
+{
+    g_assert_not_reached();
+}
+
+void gicv5_update_ppi_state(CPUARMState *env, int ppi, bool level)
+{
+}
diff --git a/target/arm/tcg-stubs.c b/target/arm/tcg-stubs.c
index 8d97449cfc6..aeeede80661 100644
--- a/target/arm/tcg-stubs.c
+++ b/target/arm/tcg-stubs.c
@@ -43,7 +43,3 @@ void vfp_clear_float_status_exc_flags(CPUARMState *env)
 void vfp_set_fpcr_to_host(CPUARMState *env, uint32_t val, uint32_t mask)
 {
 }
-
-void gicv5_update_ppi_state(CPUARMState *env, int ppi, bool level)
-{
-}
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 4412fde065f..f6ae8934d1b 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -37,6 +37,7 @@ arm_system_ss.add(when: 'CONFIG_HVF', if_true: files('hyp_gdbstub.c'))
 arm_user_ss.add(files('cpu.c'))
 arm_stubs_ss.add(files(
   'cpu32-stubs.c',
+  'gicv5-stubs.c',
   'kvm-stub.c'
 ))
 arm_user_ss.add(files(
-- 
2.53.0