[PATCH 3/4] target/arm: Only compile gicv5-cpuif.c when GICv5 is selected

Only compile gicv5-cpuif.c when ARM_GICV5 is Kconfig-selected,
otherwise we get when building with --without-default-devices:

  Undefined symbols for architecture arm64:
    "_gicv5_activate", referenced from:
        _gicr_cdia_read in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_deactivate", referenced from:
        _gic_cddi_write in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_get_hppi", referenced from:
        _gic_hppi in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_request_config", referenced from:
        _gic_cdrcfg_write in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_set_enabled", referenced from:
        _gic_cddis_write in target_arm_tcg_gicv5-cpuif.c.o
        _gic_cden_write in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_set_handling", referenced from:
        _gic_cdhm_write in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_set_pending", referenced from:
        _gic_cdpend_write in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_set_priority", referenced from:
        _gic_cdpri_write in target_arm_tcg_gicv5-cpuif.c.o
    "_gicv5_set_target", referenced from:
        _gic_cdaff_write in target_arm_tcg_gicv5-cpuif.c.o

Fixes: ee0f1ce00db ("target/arm: GICv5 cpuif: Initial skeleton and GSB barrier insns")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
 target/arm/tcg/meson.build | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index 573e8b5af48..1cd98c1b857 100644
--- a/target/arm/tcg/meson.build
+++ b/target/arm/tcg/meson.build
@@ -83,11 +83,13 @@ arm_common_user_system_ss.add(when: 'TARGET_AARCH64', if_true: files(
 arm_common_system_ss.add(files(
   'cpregs-at.c',
   'cpu32-system.c',
-  'gicv5-cpuif.c',
   'psci.c',
   'tlb_helper.c',
   'tlb-insns.c',
 ))
+arm_common_system_ss.add(when: 'CONFIG_ARM_GICV5', if_true: files(
+  'gicv5-cpuif.c',
+))
 arm_user_ss.add(files(
   'tlb_helper.c',
 ))
-- 
2.53.0