[PATCH 19/20] target/arm: Implement PMULL, PMLAL
Richard Henderson <[email protected]>
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Signed-off-by: Richard Henderson <[email protected]> --- target/arm/tcg/helper-sve-defs.h | 3 +++ target/arm/tcg/translate-sve.c | 5 +++++ target/arm/tcg/vec_helper64.c | 30 ++++++++++++++++++++++++++++++ target/arm/tcg/sve.decode | 5 +++++ 4 files changed, 43 insertions(+) diff --git a/target/arm/tcg/helper-sve-defs.h b/target/arm/tcg/helper-sve-defs.h index f78e77662d..498468a772 100644 --- a/target/arm/tcg/helper-sve-defs.h +++ b/target/arm/tcg/helper-sve-defs.h @@ -3215,3 +3215,6 @@ DEF_HELPER_FLAGS_4(sve_expand_b, TCG_CALL_NO_WG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(sve_expand_h, TCG_CALL_NO_WG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(sve_expand_s, TCG_CALL_NO_WG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(sve_expand_d, TCG_CALL_NO_WG, void, ptr, ptr, ptr, i32) + +DEF_HELPER_FLAGS_4(sve_pmull_q, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve_pmlal_q, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c index 14378cf066..b7849b5be5 100644 --- a/target/arm/tcg/translate-sve.c +++ b/target/arm/tcg/translate-sve.c @@ -8341,6 +8341,11 @@ TRANS_FEAT_STREAMING_IF(AESEMC, aa64_sve_aes2, aa64_ssve_aes, TRANS_FEAT_STREAMING_IF(AESDIMC, aa64_sve_aes2, aa64_ssve_aes, do_aes2_idx, a, gen_helper_crypto_aesdimc) +TRANS_FEAT_STREAMING_IF(PMULL, aa64_sve_aes2, aa64_ssve_aes, + gen_gvec_ool_arg_zzz, gen_helper_sve_pmull_q, a, 0) +TRANS_FEAT_STREAMING_IF(PMLAL, aa64_sve_aes2, aa64_ssve_aes, + gen_gvec_ool_arg_zzz, gen_helper_sve_pmlal_q, a, 0) + TRANS_FEAT(FCVTNT_sh_m, aa64_sme_or_sve2, gen_gvec_fpst_arg_zpz, gen_helper_sve2_fcvtnt_sh, a, 0, FPST_A64) TRANS_FEAT(FCVTNT_sh_z, aa64_sme2p2_or_sve2p2, gen_gvec_fpst_arg_zpz, diff --git a/target/arm/tcg/vec_helper64.c b/target/arm/tcg/vec_helper64.c index 8879969350..7d4e21b9c7 100644 --- a/target/arm/tcg/vec_helper64.c +++ b/target/arm/tcg/vec_helper64.c @@ -89,6 +89,36 @@ void HELPER(sve2_pmull_d)(void *vd, void *vn, void *vm, uint32_t desc) } } +void HELPER(sve_pmull_q)(void *vd, void *vn, void *vm, uint32_t desc) +{ + intptr_t opr_sz = simd_oprsz(desc); + uint64_t *n = vn, *m = vm; + Int128 *d0 = vd; + Int128 *d1 = vd + sizeof(ARMVectorReg); + + for (intptr_t i = 0; i < opr_sz / 16; ++i) { + Int128 rl = clmul_64(n[2 * i + 0], m[2 * i + 0]); + Int128 rh = clmul_64(n[2 * i + 1], m[2 * i + 1]); + d0[i] = rl; + d1[i] = rh; + } +} + +void HELPER(sve_pmlal_q)(void *vd, void *vn, void *vm, uint32_t desc) +{ + intptr_t opr_sz = simd_oprsz(desc); + uint64_t *n = vn, *m = vm; + Int128 *d0 = vd; + Int128 *d1 = vd + sizeof(ARMVectorReg); + + for (intptr_t i = 0; i < opr_sz / 16; ++i) { + Int128 rl = clmul_64(n[2 * i + 0], m[2 * i + 0]); + Int128 rh = clmul_64(n[2 * i + 1], m[2 * i + 1]); + d0[i] = int128_xor(d0[i], rl); + d1[i] = int128_xor(d1[i], rh); + } +} + DO_3OP_PAIR(gvec_ah_fmaxp_h, helper_vfp_ah_maxh, float16, H2) DO_3OP_PAIR(gvec_ah_fmaxp_s, helper_vfp_ah_maxs, float32, H4) DO_3OP_PAIR(gvec_ah_fmaxp_d, helper_vfp_ah_maxd, float64, /**/) diff --git a/target/arm/tcg/sve.decode b/target/arm/tcg/sve.decode index 7030d81db7..42f451ff9f 100644 --- a/target/arm/tcg/sve.decode +++ b/target/arm/tcg/sve.decode @@ -1994,6 +1994,11 @@ AESEMC 01000101 00 1 .. .11111010 ..... ...00 @aes2_4 AESDIMC 01000101 00 1 .. .11111011 ..... ....0 @aes2_2 AESDIMC 01000101 00 1 .. .11111011 ..... ...00 @aes2_4 +PMULL 01000101 00 1 rm:5 111110 rn:5 ....0 \ + &rrr_esz esz=0 rd=%zd_ax2 +PMLAL 01000101 00 1 rm:5 111111 rn:5 ....0 \ + &rrr_esz esz=0 rd=%zd_ax2 + # SVE2 crypto constructive binary operations SM4EKEY 01000101 00 1 ..... 11110 0 ..... ..... @rd_rn_rm_e0 RAX1 01000101 00 1 ..... 11110 1 ..... ..... @rd_rn_rm_e0 -- 2.43.0