[PATCH 5/6] target/arm: Implement SCR_EL3.TID5
Richard Henderson <[email protected]> Thu, 23 Jul 2026 20:11:22 -0700
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Signed-off-by: Richard Henderson <[email protected]> --- target/arm/helper.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 022a63a511..c92df41707 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5485,8 +5485,21 @@ static const ARMCPRegInfo dcpodp_reg[] = { static CPAccessResult access_tid5(CPUARMState *env, const ARMCPRegInfo *ri, bool isread) { - if ((arm_current_el(env) < 2) && (arm_hcr_el2_eff(env) & HCR_TID5)) { - return CP_ACCESS_TRAP_EL2; + switch (arm_current_el(env)) { + case 1: + if (arm_hcr_el2_eff(env) & HCR_TID5) { + return CP_ACCESS_TRAP_EL2; + } + /* fall through */ + case 2: + if (env->cp15.scr_el3 & SCR_TID5) { + return CP_ACCESS_TRAP_EL3; + } + break; + case 3: + break; + default: + g_assert_not_reached(); } return CP_ACCESS_OK; -- 2.43.0