[PATCH v2 3/8] arm/aspeed: Wire AST2700 FSI controllers to APB-to-OPB bridges
Mikail Sadic <[email protected]> Thu, 30 Jul 2026 15:09:38 -0500
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
The AST2700 SoC exposes two FSI controllers behind APB-to-OPB bridges. Add the ASPEED_DEV_FSI1/FSI2 memory-map entries, instantiate both fsi[] APB-to-OPB bridges and map them during SoC realize, so the CFAM/CFAM-S devices on the FSI local buses become reachable from the SoC. Signed-off-by: Mikail Sadic <[email protected]> --- hw/arm/aspeed_ast27x0.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index dddd7d2106..b908d7d4ff 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -17,6 +17,7 @@ #include "qemu/module.h" #include "qemu/error-report.h" #include "hw/i2c/aspeed_i2c.h" +#include "hw/fsi/aspeed_apb2opb.h" #include "net/net.h" #include "system/qtest.h" #include "system/system.h" @@ -98,6 +99,8 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = { [ASPEED_DEV_PCIE_MMIO0] = 0x60000000, [ASPEED_DEV_PCIE_MMIO1] = 0x80000000, [ASPEED_DEV_PCIE_MMIO2] = 0xA0000000, + [ASPEED_DEV_FSI1] = 0x21800000, + [ASPEED_DEV_FSI2] = 0x23800000, [ASPEED_DEV_SPI_BOOT] = 0x100000000, [ASPEED_DEV_SDRAM] = 0x400000000, }; @@ -559,6 +562,11 @@ static void aspeed_soc_ast2700_init(Object *obj) sc->silicon_rev); } + for (i = 0; i < ARRAY_SIZE(s->fsi); i++) { + object_initialize_child(obj, "fsi[*]", &s->fsi[i], + TYPE_ASPEED_APB2OPB); + } + object_initialize_child(obj, "dpmcu", &s->dpmcu, TYPE_UNIMPLEMENTED_DEVICE); object_initialize_child(obj, "iomem", &s->iomem, @@ -1132,6 +1140,16 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) } } + /* FSI / OPB */ + for (i = 0; i < ARRAY_SIZE(s->fsi); i++) { + if (!sysbus_realize(SYS_BUS_DEVICE(&s->fsi[i]), errp)) { + return; + } + aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->fsi[i]), 0, + sc->memmap[ASPEED_DEV_FSI1 + i]); + } + + aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->dpmcu), "aspeed.dpmcu", sc->memmap[ASPEED_DEV_DPMCU], -- 2.53.0