[PATCH 00/11] tcg: Add revbit opcodes
Richard Henderson <[email protected]> Thu, 30 Jul 2026 17:04:52 -0700
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Adding these have been at the back of my mind for a while. Most recently
tickled by the Octeon additions, and Anton's helper-to-tcg work.
I didn't add a 16-bit function or opcode because no host implements it.
The 16-bit reverse that the hexagon target does can be implemented with
a 32-bit reverse plus a shift.
r~
Richard Henderson (11):
tcg: Fix opcode dump for bswap
tcg: Add tcg_gen_revbit{32,64}
target/arm: Use generic tcg_gen_revbit*
target/loongarch: Use generic tcg_gen_revbit*
target/loongarch: Expand bitswap inline
target/mips: Expand octeon reflections inline
tcg: Add revbit{32,64} opcodes
tcg/optimize: Handle revbit{32,64}
tcg/aarch64: Implement revbit{32,64}
tcg/loongarch64: Import REVBIT insns
tcg/loongarch64: Implement revbit{32,64}
include/tcg/tcg-op-common.h | 3 +
include/tcg/tcg-op.h | 5 +
include/tcg/tcg-opc.h | 2 +
target/arm/tcg/helper-a64-defs.h | 1 -
target/arm/tcg/helper-defs.h | 1 -
target/loongarch/tcg/helper.h | 4 -
target/mips/helper.h | 7 -
target/arm/tcg/helper-a64.c | 5 -
target/arm/tcg/op_helper.c | 5 -
target/arm/tcg/translate-a64.c | 4 +-
target/arm/tcg/translate.c | 2 +-
target/loongarch/tcg/op_helper.c | 21 -
target/mips/tcg/octeon_crypto.c | 35 -
target/mips/tcg/octeon_translate.c | 49 +-
tcg/optimize.c | 48 +-
tcg/tcg-op.c | 78 ++
tcg/tcg.c | 8 +-
docs/devel/tcg-ops.rst | 11 +
.../loongarch/tcg/insn_trans/trans_bit.c.inc | 29 +-
tcg/aarch64/tcg-target.c.inc | 24 +
tcg/loongarch64/tcg-insn-defs.c.inc | 944 +++++++++---------
tcg/loongarch64/tcg-target.c.inc | 26 +
tcg/ppc64/tcg-target.c.inc | 8 +
tcg/riscv64/tcg-target.c.inc | 8 +
tcg/s390x/tcg-target.c.inc | 8 +
tcg/sparc64/tcg-target.c.inc | 8 +
tcg/tci/tcg-target.c.inc | 8 +
tcg/x86_64/tcg-target.c.inc | 8 +
28 files changed, 787 insertions(+), 573 deletions(-)
--
2.43.0