Re: [PATCH 05/11] target/loongarch: Expand bitswap inline

Song Gao <[email protected]> Wed, 5 Aug 2026 17:17:15 +0800
Newsgroups org.nongnu.qemu-arm,org.nongnu.qemu-devel
Message-ID <[email protected]>
在 2026/7/31 上午8:04, Richard Henderson 写道:
> The bitrev_[48]b instructions reverse bits within each byte.
> This may be accomplished by reversing bits within the entire
> word followed by reversing the bytes with the entire word.
>
> Signed-off-by: Richard Henderson <[email protected]>
> ---
>   target/loongarch/tcg/helper.h                 |  2 --
>   target/loongarch/tcg/op_helper.c              | 11 ----------
>   .../loongarch/tcg/insn_trans/trans_bit.c.inc  | 20 +++++++++++++++++--
>   3 files changed, 18 insertions(+), 15 deletions(-)
Reviewed-by:  Song Gao <[email protected]>

Thanks.
Song Gao
> diff --git a/target/loongarch/tcg/helper.h b/target/loongarch/tcg/helper.h
> index 4b0fc81db6..e76c73c775 100644
> --- a/target/loongarch/tcg/helper.h
> +++ b/target/loongarch/tcg/helper.h
> @@ -5,8 +5,6 @@
>   
>   DEF_HELPER_2(raise_exception, noreturn, env, i32)
>   
> -DEF_HELPER_FLAGS_1(bitswap, TCG_CALL_NO_RWG_SE, tl, tl)
> -
>   DEF_HELPER_FLAGS_3(asrtle_d, TCG_CALL_NO_WG, void, env, tl, tl)
>   DEF_HELPER_FLAGS_3(asrtgt_d, TCG_CALL_NO_WG, void, env, tl, tl)
>   
> diff --git a/target/loongarch/tcg/op_helper.c b/target/loongarch/tcg/op_helper.c
> index 37afa8e92d..f41f0cb1e6 100644
> --- a/target/loongarch/tcg/op_helper.c
> +++ b/target/loongarch/tcg/op_helper.c
> @@ -22,17 +22,6 @@ void helper_raise_exception(CPULoongArchState *env, uint32_t exception)
>       do_raise_exception(env, exception, GETPC());
>   }
>   
> -target_ulong helper_bitswap(target_ulong v)
> -{
> -    v = ((v >> 1) & (target_ulong)0x5555555555555555ULL) |
> -        ((v & (target_ulong)0x5555555555555555ULL) << 1);
> -    v = ((v >> 2) & (target_ulong)0x3333333333333333ULL) |
> -        ((v & (target_ulong)0x3333333333333333ULL) << 2);
> -    v = ((v >> 4) & (target_ulong)0x0F0F0F0F0F0F0F0FULL) |
> -        ((v & (target_ulong)0x0F0F0F0F0F0F0F0FULL) << 4);
> -    return v;
> -}
> -
>   /* loongarch assert op */
>   void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
>   {
> diff --git a/target/loongarch/tcg/insn_trans/trans_bit.c.inc b/target/loongarch/tcg/insn_trans/trans_bit.c.inc
> index 3d24e320ce..1200f931fa 100644
> --- a/target/loongarch/tcg/insn_trans/trans_bit.c.inc
> +++ b/target/loongarch/tcg/insn_trans/trans_bit.c.inc
> @@ -178,6 +178,22 @@ static void gen_masknez(TCGv dest, TCGv src1, TCGv src2)
>       tcg_gen_movcond_tl(TCG_COND_NE, dest, src2, zero, zero, src1);
>   }
>   
> +static void gen_bitrev_4b(TCGv dest, TCGv src)
> +{
> +    TCGv_i32 t = tcg_temp_new_i32();
> +
> +    tcg_gen_trunc_tl_i32(t, src);
> +    tcg_gen_revbit32_i32(t, t);
> +    tcg_gen_bswap32_i32(t, t);
> +    tcg_gen_ext_i32_tl(dest, t);
> +}
> +
> +static void gen_bitrev_8b(TCGv dest, TCGv src)
> +{
> +    tcg_gen_revbit_tl(dest, src);
> +    tcg_gen_bswap_tl(dest, dest);
> +}
> +
>   static void gen_bitrev_w(TCGv dest, TCGv src)
>   {
>       tcg_gen_revbit32_tl(dest, src, TCG_BSWAP_OS);
> @@ -199,8 +215,8 @@ TRANS(revb_2w, 64, gen_rr, EXT_NONE, EXT_NONE, gen_revb_2w)
>   TRANS(revb_d, 64, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_bswap64_i64)
>   TRANS(revh_2w, 64, gen_rr, EXT_NONE, EXT_NONE, gen_revh_2w)
>   TRANS(revh_d, 64, gen_rr, EXT_NONE, EXT_NONE, gen_revh_d)
> -TRANS(bitrev_4b, ALL, gen_rr, EXT_ZERO, EXT_SIGN, gen_helper_bitswap)
> -TRANS(bitrev_8b, 64, gen_rr, EXT_NONE, EXT_NONE, gen_helper_bitswap)
> +TRANS(bitrev_4b, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_bitrev_4b)
> +TRANS(bitrev_8b, 64, gen_rr, EXT_NONE, EXT_NONE, gen_bitrev_8b)
>   TRANS(bitrev_w, ALL, gen_rr, EXT_NONE, EXT_NONE, gen_bitrev_w)
>   TRANS(bitrev_d, 64, gen_rr, EXT_NONE, EXT_NONE, tcg_gen_revbit64_i64)
>   TRANS(maskeqz, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, gen_maskeqz)