RE: [PATCH v2 15/17] hw/misc/aspeed_hace: Enable the crypto command on the AST2700

> -----Original Message-----
> From: Jamin Lin <[email protected]>
> Sent: Wednesday, July 15, 2026 11:34 AM
> To: Daniel P. Berrangé <[email protected]>; Cédric Le Goater
> <[email protected]>; Peter Maydell <[email protected]>; Steven Lee
> <[email protected]>; Troy Lee <[email protected]>; Kane Chen
> <[email protected]>; Andrew Jeffery
> <[email protected]>; Joel Stanley <[email protected]>; Eric Blake
> <[email protected]>; Markus Armbruster <[email protected]>; Fabiano
> Rosas <[email protected]>; Laurent Vivier <[email protected]>; Paolo Bonzini
> <[email protected]>; open list:All patches CC here
> <[email protected]>; open list:ASPEED BMCs
> <[email protected]>
> Cc: Jamin Lin <[email protected]>; Troy Lee
> <[email protected]>
> Subject: [PATCH v2 15/17] hw/misc/aspeed_hace: Enable the crypto command
> on the AST2700
> 
> With direct/scatter-gather access, 64-bit DMA and AES-GCM all in place, the
> AST2700 crypto engine is now fully modelled. Drop its temporary
> interrupt-only workaround so the crypto command runs for real, like the other
> HACE variants.
> 
> Signed-off-by: Jamin Lin <[email protected]>
> ---
>  include/hw/misc/aspeed_hace.h |  1 -
>  hw/misc/aspeed_hace.c         | 15 +--------------
>  2 files changed, 1 insertion(+), 15 deletions(-)
> 
> diff --git a/include/hw/misc/aspeed_hace.h b/include/hw/misc/aspeed_hace.h
> index b5416b0cb5..9b0e7683fa 100644
> --- a/include/hw/misc/aspeed_hace.h
> +++ b/include/hw/misc/aspeed_hace.h
> @@ -49,7 +49,6 @@ struct AspeedHACEClass {
>      uint32_t key_mask;
>      uint32_t hash_mask;
>      uint64_t nr_regs;
> -    bool raise_crypt_interrupt_workaround;
>      uint32_t src_hi_mask;
>      uint32_t dest_hi_mask;
>      uint32_t key_hi_mask;
> diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c index
> 927759b48f..90d43c0676 100644
> --- a/hw/misc/aspeed_hace.c
> +++ b/hw/misc/aspeed_hace.c
> @@ -1005,14 +1005,7 @@ static void aspeed_hace_write(void *opaque,
> hwaddr addr, uint64_t data,
>          break;
>      }
>      case R_CRYPT_CMD:
> -        /*
> -         * The AST2700 crypto engine needs 64-bit DMA and AES-GCM,
> which are
> -         * added later; until then it keeps the temporary workaround of
> only
> -         * raising the completion interrupt without running the command.
> -         */
> -        if (!ahc->raise_crypt_interrupt_workaround) {
> -            do_crypt_operation(s, data);
> -        }
> +        do_crypt_operation(s, data);
> 
>          /* Hardware raises the crypt interrupt once the command finishes.
> */
>          s->regs[R_STATUS] |= CRYPT_IRQ; @@ -1216,12 +1209,6 @@ static
> void aspeed_ast2700_hace_class_init(ObjectClass *klass, const void *data)
>      ahc->dest_hi_mask = 0x00000003;
>      ahc->key_hi_mask = 0x00000003;
> 
> -    /*
> -     * Currently, it does not support the CRYPT command. Instead, it only
> -     * sends an interrupt to notify the firmware that the crypt command
> -     * has completed. It is a temporary workaround.
> -     */
> -    ahc->raise_crypt_interrupt_workaround = true;
>      ahc->has_dma64 = true;
>  }
> 
> --
> 2.43.0

Reviewed-by: Kane Chen <[email protected]>