[PATCH v2 07/19] hw/net/bcm2838_genet: add GENET register structs, part 3/4
Marcelo Manzo <[email protected]>
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
From: Sergey Kambalin <[email protected]> Add the TDMA (transmit DMA ring/length-status) register layout and field accessors, and the PHY BMCR/BMSR MII register field definitions. Part of Sergey Kambalin's original Raspberry Pi 4B PCIe/GENET networking series (patchwork series 829638, posted to qemu-devel in 2024, never merged). Carried forward and completed by Marcelo Manzo. Signed-off-by: Sergey Kambalin <[email protected]> Signed-off-by: Marcelo Manzo <[email protected]> --- hw/net/bcm2838_genet.c | 88 ++++++++++++++++++++++++++++++++++ include/hw/net/bcm2838_genet.h | 88 ++++++++++++++++++++++++++++++++++ 2 files changed, 176 insertions(+) diff --git a/hw/net/bcm2838_genet.c b/hw/net/bcm2838_genet.c index 12a80534fb..2bc2a770b1 100644 --- a/hw/net/bcm2838_genet.c +++ b/hw/net/bcm2838_genet.c @@ -148,6 +148,94 @@ FIELD(GENET_RDMA_LENGTH_STATUS, OWN, 15, 1) FIELD(GENET_RDMA_LENGTH_STATUS, BUFLENGTH, 16, 12) FIELD(GENET_RDMA_LENGTH_STATUS, RSVD_28_31, 29, 4) +REG32(GENET_TDMA_LENGTH_STATUS, 0) +FIELD(GENET_TDMA_LENGTH_STATUS, RSVD_0_3, 0, 4) +FIELD(GENET_TDMA_LENGTH_STATUS, DO_CSUM, 4, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, OW_CRC, 5, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, APPEND_CRC, 6, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, RSVD_7_8, 7, 2) +FIELD(GENET_TDMA_LENGTH_STATUS, UNDERRUN, 9, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, RSVD_10_11, 10, 2) +FIELD(GENET_TDMA_LENGTH_STATUS, WRAP, 12, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, SOP, 13, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, EOP, 14, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, OWN, 15, 1) +FIELD(GENET_TDMA_LENGTH_STATUS, BUFLENGTH, 16, 12) +FIELD(GENET_TDMA_LENGTH_STATUS, RSVD_28_31, 29, 4) + +REG16(GENET_PHY_BMCR, 0) +FIELD(GENET_PHY_BMCR, RSVD_0_5, 0, 6) +FIELD(GENET_PHY_BMCR, SPEED1000, 6, 1) +FIELD(GENET_PHY_BMCR, CTST, 7, 1) +FIELD(GENET_PHY_BMCR, FULLDPLX, 8, 1) +FIELD(GENET_PHY_BMCR, ANRESTART, 9, 1) +FIELD(GENET_PHY_BMCR, ISOLATE, 10, 1) +FIELD(GENET_PHY_BMCR, PDOWN, 11, 1) +FIELD(GENET_PHY_BMCR, AENABLE, 12, 1) +FIELD(GENET_PHY_BMCR, SPEED100, 13, 1) +FIELD(GENET_PHY_BMCR, LOOPBACK, 14, 1) +FIELD(GENET_PHY_BMCR, RESET, 15, 1) + +REG16(GENET_PHY_BMSR, 0) +FIELD(GENET_PHY_BMSR, ERCAP, 0, 1) +FIELD(GENET_PHY_BMSR, JCD, 1, 1) +FIELD(GENET_PHY_BMSR, LSTATUS, 2, 1) +FIELD(GENET_PHY_BMSR, ANEGCAPABLE, 3, 1) +FIELD(GENET_PHY_BMSR, RFAULT, 4, 1) +FIELD(GENET_PHY_BMSR, ANEGCOMPLETE, 5, 1) +FIELD(GENET_PHY_BMSR, RSVD_6_7, 6, 2) +FIELD(GENET_PHY_BMSR, ESTATEN, 8, 1) +FIELD(GENET_PHY_BMSR, _100HALF2, 9, 1) +FIELD(GENET_PHY_BMSR, _100FULL2, 10, 1) +FIELD(GENET_PHY_BMSR, _10HALF, 11, 1) +FIELD(GENET_PHY_BMSR, _10FULL, 12, 1) +FIELD(GENET_PHY_BMSR, _100HALF, 13, 1) +FIELD(GENET_PHY_BMSR, _100FULL, 14, 1) +FIELD(GENET_PHY_BMSR, _10BASE4, 15, 1) + +REG16(GENET_PHY_LPA, 0) +FIELD(GENET_PHY_LPA, SLCT, 0, 5) +FIELD(GENET_PHY_LPA, _10HALF_1000XFULL, 5, 1) +FIELD(GENET_PHY_LPA, _10FULL_1000XHALF, 6, 1) +FIELD(GENET_PHY_LPA, _100HALF_1000XPAUSE, 7, 1) +FIELD(GENET_PHY_LPA, _100FULL_1000XPAUSE_ASYM, 8, 1) +FIELD(GENET_PHY_LPA, _100BASE4, 9, 1) +FIELD(GENET_PHY_LPA, PAUSE_CAP, 10, 1) +FIELD(GENET_PHY_LPA, PAUSE_ASYM, 11, 1) +FIELD(GENET_PHY_LPA, RSVD_12, 12, 1) +FIELD(GENET_PHY_LPA, RFAULT, 13, 1) +FIELD(GENET_PHY_LPA, LPACK, 14, 1) +FIELD(GENET_PHY_LPA, NPAGE, 15, 1) + +REG16(GENET_PHY_STAT_1000, 0) +FIELD(GENET_PHY_STAT_1000, RSVD_0_9, 0, 10) +FIELD(GENET_PHY_STAT_1000, HALF, 10, 1) +FIELD(GENET_PHY_STAT_1000, FULL, 11, 1) +FIELD(GENET_PHY_STAT_1000, REMRXOK, 12, 1) +FIELD(GENET_PHY_STAT_1000, LOCALRXOK, 13, 1) +FIELD(GENET_PHY_STAT_1000, MSRES, 14, 1) +FIELD(GENET_PHY_STAT_1000, MSFAIL, 15, 1) + +REG16(GENET_PHY_AUX_CTRL_0, 0) +FIELD(GENET_PHY_AUX_CTRL_0, REG_ID_MASK, 0, 3) +FIELD(GENET_PHY_AUX_CTRL_0, RSVD_3, 3, 1) +FIELD(GENET_PHY_AUX_CTRL_0, REG_DATA, 4, 8) +FIELD(GENET_PHY_AUX_CTRL_0, REG_ID, 12, 3) +FIELD(GENET_PHY_AUX_CTRL_0, MISC_WREN, 15, 1) + +REG16(GENET_PHY_AUX_CTRL_1, 0) +FIELD(GENET_PHY_AUX_CTRL_1, RSVD_0_3, 0, 4) +FIELD(GENET_PHY_AUX_CTRL_1, REG_DATA, 4, 12) + +REG16(GENET_PHY_SHADOW, 0) +FIELD(GENET_PHY_SHADOW, REG_DATA, 0, 10) +FIELD(GENET_PHY_SHADOW, REG_ID, 10, 5) +FIELD(GENET_PHY_SHADOW, WR, 15, 1) + +REG16(GENET_PHY_EXP_SEL, 0) +FIELD(GENET_PHY_EXP_SEL, REG_ID, 0, 8) +FIELD(GENET_PHY_EXP_SEL, BLOCK_ID, 8, 8) + static uint64_t bcm2838_genet_read(void *opaque, hwaddr offset, unsigned size) { uint64_t value = ~0; diff --git a/include/hw/net/bcm2838_genet.h b/include/hw/net/bcm2838_genet.h index b3893c2dad..fedfbde066 100644 --- a/include/hw/net/bcm2838_genet.h +++ b/include/hw/net/bcm2838_genet.h @@ -22,6 +22,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(BCM2838GenetState, BCM2838_GENET) #define BCM2838_GENET_DMA_RING_CNT 17 #define BCM2838_GENET_DMA_RING_DEFAULT (BCM2838_GENET_DMA_RING_CNT - 1) +#define BCM2838_GENET_HFB_FILTER_CNT 48 +#define BCM2838_GENET_HFB_FILTER_SIZE 128 + typedef struct { uint32_t rev_ctrl; uint32_t port_ctrl; @@ -169,6 +172,53 @@ typedef struct { uint32_t reserved_0x10D0[972]; } BCM2838GenetRegsRdma; +typedef struct { + uint32_t length_status; + uint32_t address_lo; + uint32_t address_hi; +} BCM2838GenetTdmaDesc; + +typedef struct { + uint32_t read_ptr; + uint32_t read_ptr_hi; + uint32_t cons_index; + uint32_t prod_index; + uint32_t ring_buf_size; + uint32_t start_addr; + uint32_t start_addr_hi; + uint32_t end_addr; + uint32_t end_addr_hi; + uint32_t mbuf_done_tresh; + uint32_t flow_period; + uint32_t write_ptr; + uint32_t write_ptr_hi; + uint32_t reserved_0x34[3]; +} BCM2838GenetTdmaRing; + +typedef struct { + BCM2838GenetTdmaDesc descs[BCM2838_GENET_DMA_DESC_CNT]; + BCM2838GenetTdmaRing rings[BCM2838_GENET_DMA_RING_CNT]; + uint32_t ring_cfg; + uint32_t ctrl; + uint32_t status; + uint32_t scb_burst_size; + uint32_t reserved_0x1050[7]; + uint32_t arb_ctrl; + uint32_t priority[3]; + uint32_t reserved_0x10D0[993]; +} BCM2838GenetRegsTdma; + +typedef struct { + uint8_t flt[BCM2838_GENET_HFB_FILTER_CNT * BCM2838_GENET_HFB_FILTER_SIZE + * sizeof(uint32_t)]; + uint32_t reserved_0x6000[1792]; + uint32_t ctrl; + uint32_t flt_enable[2]; + uint32_t reserved_0x7C0C[4]; + uint32_t flt_len[BCM2838_GENET_HFB_FILTER_CNT / sizeof(uint32_t)]; + uint32_t reserved_0x7C4C[237]; +} BCM2838GenetRegsHfb; + typedef struct { BCM2838GenetRegsSys sys; BCM2838GenetRegsGrBridge gr_bridge; @@ -184,8 +234,45 @@ typedef struct { BCM2838GenetRegsUmac umac; uint32_t reserved_0x1000[1024]; BCM2838GenetRegsRdma rdma; + BCM2838GenetRegsTdma tdma; + uint32_t reserved_0x6000[2048]; + BCM2838GenetRegsHfb hfb; } BCM2838GenetRegs; +typedef struct { + uint16_t bmcr; + uint16_t bmsr; + uint16_t sid1; + uint16_t sid2; + uint16_t advertise; + uint16_t lpa; + uint16_t expansion; + uint16_t next_page; + uint16_t lpa_next_page; + uint16_t ctrl1000; + uint16_t stat1000; + uint16_t reserved_11_12[2]; + uint16_t mmd_ctrl; + uint16_t mmd_data; + uint16_t estatus; + uint16_t ecr; + uint16_t esr; + uint16_t dcounter; + uint16_t fcscounter; + uint16_t nwaytest; + uint16_t exp_data; + uint16_t srevision; + uint16_t exp_ctrl; + uint16_t aux_ctl; + uint16_t phyaddr; + uint16_t isr; + uint16_t imr; + uint16_t shd; + uint16_t reserved_29; + uint16_t rdb_addr; + uint16_t rdb_data; +} BCM2838GenetPhyRegs; + struct BCM2838GenetState { /*< private >*/ SysBusDevice parent_obj; @@ -196,6 +283,7 @@ struct BCM2838GenetState { AddressSpace dma_as; BCM2838GenetRegs regs; + BCM2838GenetPhyRegs phy_regs; qemu_irq irq_default; qemu_irq irq_prio; -- 2.47.1