[PATCH 03/10] hw/arm: fsl-imx6ul: Map early firmware register placeholders
Bin Meng <[email protected]>
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
U-Boot configures the AIPS bus access controls and the i.MX6UL SNVS low-power registers before its console is available. Its timer setup also enables the system counter through the control window on AIPS2. These blocks are not modeled yet. Map unimplemented regions at their documented addresses so early firmware accesses complete without falling through to unmapped memory. Signed-off-by: Bin Meng <[email protected]> --- hw/arm/fsl-imx6ul.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index d6f662efe4..74c1a30959 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -210,6 +210,21 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) create_unimplemented_device("a7mpcore-dap", FSL_IMX6UL_A7MPCORE_DAP_ADDR, FSL_IMX6UL_A7MPCORE_DAP_SIZE); + /* AIPS bus configuration */ + create_unimplemented_device("aips1-config", FSL_IMX6UL_AIPS1_CFG_ADDR, + FSL_IMX6UL_AIPS1_CFG_SIZE); + create_unimplemented_device("aips2-config", FSL_IMX6UL_AIPS2_CFG_ADDR, + FSL_IMX6UL_AIPS2_CFG_SIZE); + + /* SNVS low-power general-purpose registers */ + create_unimplemented_device("snvs-lp", FSL_IMX6UL_SNVS_LP_ADDR, + FSL_IMX6UL_SNVS_LP_SIZE); + + /* System counter control */ + create_unimplemented_device("sys-counter-control", + FSL_IMX6UL_SYS_CNT_CTRL_ADDR, + FSL_IMX6UL_SYS_CNT_CTRL_SIZE); + /* * MMDC */ -- 2.53.0