Re: [PATCH 7/7] target/arm: Separate cpu types max-v8 and max-v9
Peter Maydell <[email protected]>
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <CAFEAcA8Q3RmeGpTdC1KjTBMriiUMmYZTEpgiP83PBDvUmCdOkw@mail.gmail.com> |
On Thu, 6 Aug 2026 at 17:41, Richard Henderson <[email protected]> wrote: > > Do not include v9-only features in "max-v8". > Do not include the prohibited v8 features in "max-v9". > In tcg mode, define "max" as "max-v9". > > Signed-off-by: Richard Henderson <[email protected]> > --- > target/arm/internals.h | 2 +- > target/arm/cpu-max.c | 2 +- > target/arm/tcg/cpu64.c | 408 ++++++++++++++++++++-------------- > target/arm/tcg/stubs32.c | 2 +- > docs/system/arm/emulation.rst | 11 +- > 5 files changed, 253 insertions(+), 172 deletions(-) > > diff --git a/target/arm/internals.h b/target/arm/internals.h > index 5e7f41a50d..2ced0b1c2c 100644 > --- a/target/arm/internals.h > +++ b/target/arm/internals.h > @@ -1809,7 +1809,7 @@ void aarch64_cpu_sve_finalize(ARMCPU *cpu, Error **errp); > void aarch64_cpu_sme_finalize(ARMCPU *cpu, Error **errp); > void aarch64_cpu_pauth_finalize(ARMCPU *cpu, Error **errp); > void aarch64_cpu_lpa2_finalize(ARMCPU *cpu, Error **errp); > -void aarch64_max_tcg_initfn(Object *obj); > +void aarch64_max_v9_tcg_initfn(Object *obj); > void aarch64_add_pauth_properties(Object *obj); > void aarch64_add_sve_properties(Object *obj); > void aarch64_add_sme_properties(Object *obj); > diff --git a/target/arm/cpu-max.c b/target/arm/cpu-max.c > index cfcc46eb9d..e6872c1c8d 100644 > --- a/target/arm/cpu-max.c > +++ b/target/arm/cpu-max.c > @@ -220,7 +220,7 @@ static void cpu_max_initfn(Object *obj) > * '-cpu max' for TCG: we currently do this as > * "A57 with extra things" > */ > - aarch64_max_tcg_initfn(obj); > + aarch64_max_v9_tcg_initfn(obj); > } > } > > diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c > index 556fa9fa3c..5eeb6712da 100644 > --- a/target/arm/tcg/cpu64.c > +++ b/target/arm/tcg/cpu64.c > @@ -1156,13 +1156,11 @@ static void aarch64_neoverse_n2_initfn(Object *obj) > } > > /* > - * -cpu max: a CPU with as many features enabled as our emulation supports. > - * The version of '-cpu max' for qemu-system-arm is defined in cpu32.c; > - * this only needs to handle 64 bits. > + * -cpu max-v8: an ARMv8 CPU with as many features enabled as > + * our emulation supports. > */ > -void aarch64_max_tcg_initfn(Object *obj) > +static void aarch64_max_v8_tcg_initfn_aa64(ARMCPU *cpu) > { > - ARMCPU *cpu = ARM_CPU(obj); > ARMISARegisters *isar = &cpu->isar; > uint64_t t; > uint32_t u; > @@ -1226,203 +1224,148 @@ void aarch64_max_tcg_initfn(Object *obj) > t = FIELD_DP64(t, CTR_EL0, DIC, 1); > cpu->ctr = t; > > + /* > + * Below, note the revision from which the feature is OPTIONAL. > + */ > t = GET_IDREG(isar, ID_AA64ISAR0); > - t = FIELD_DP64(t, ID_AA64ISAR0, AES, 2); /* FEAT_PMULL */ > - t = FIELD_DP64(t, ID_AA64ISAR0, SHA1, 1); /* FEAT_SHA1 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, SHA2, 2); /* FEAT_SHA512 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, CRC32, 1); /* FEAT_CRC32 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, ATOMIC, 3); /* FEAT_LSE, FEAT_LSE128 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, RDM, 1); /* FEAT_RDM */ > - t = FIELD_DP64(t, ID_AA64ISAR0, SHA3, 1); /* FEAT_SHA3 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, SM3, 1); /* FEAT_SM3 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, SM4, 1); /* FEAT_SM4 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1); /* FEAT_DotProd */ > - t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1); /* FEAT_FHM */ > - t = FIELD_DP64(t, ID_AA64ISAR0, TS, 2); /* FEAT_FlagM2 */ > - t = FIELD_DP64(t, ID_AA64ISAR0, TLB, 2); /* FEAT_TLBIRANGE */ > - t = FIELD_DP64(t, ID_AA64ISAR0, RNDR, 1); /* FEAT_RNG */ > + t = FIELD_DP64(t, ID_AA64ISAR0, AES, 2); /* v8.0: FEAT_PMULL */ > + t = FIELD_DP64(t, ID_AA64ISAR0, SHA1, 1); /* v8.0: FEAT_SHA1 */ > + t = FIELD_DP64(t, ID_AA64ISAR0, SHA2, 2); /* v8.1: FEAT_SHA512 */ > + t = FIELD_DP64(t, ID_AA64ISAR0, CRC32, 1); /* v8.0: FEAT_CRC32 */ > + t = FIELD_DP64(t, ID_AA64ISAR0, ATOMIC, 2); /* v8.0: FEAT_LSE */ > + t = FIELD_DP64(t, ID_AA64ISAR0, RDM, 1); /* v8.0: FEAT_RDM */ > + t = FIELD_DP64(t, ID_AA64ISAR0, SHA3, 1); /* v8.1: FEAT_SHA3 */ > + t = FIELD_DP64(t, ID_AA64ISAR0, SM3, 1); /* v8.1: FEAT_SM3 */ > + t = FIELD_DP64(t, ID_AA64ISAR0, SM4, 1); /* v8.1: FEAT_SM4 */ > + t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1); /* v8.1: FEAT_DotProd */ > + t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1); /* v8.1: FEAT_FHM */ > + t = FIELD_DP64(t, ID_AA64ISAR0, TS, 2); /* v8.1: FEAT_FlagM2 */ > + t = FIELD_DP64(t, ID_AA64ISAR0, TLB, 2); /* v8.3: FEAT_TLBIRANGE */ > + t = FIELD_DP64(t, ID_AA64ISAR0, RNDR, 1); /* v8.4: FEAT_RNG */ > SET_IDREG(isar, ID_AA64ISAR0, t); Because this commit updates every line to put the optional-from version in the comment, it makes it very hard to review for what has functionally changed (i.e. which features that we previously had in 'max' have we dropped from 'max-v8'). Could we do the bulk comment update as a separate commit, please ? thanks -- PMM