Re: [PATCH v2 10/10] target/arm: Separate cpu types max-v8 and max-v9

On Wed, 12 Aug 2026 at 21:45, Richard Henderson
<[email protected]> wrote:
>
> Do not include v9-only features in "max-v8".
> Do not include the prohibited v8 features in "max-v9".
> In tcg mode, define "max" as "max-v9".
>
> Signed-off-by: Richard Henderson <[email protected]>



> +/*
> + * -cpu max-v9: an ARMv9 CPU with as many features enabled as
> + * our emulation supports.
> + */
> +void aarch64_max_v9_tcg_initfn(Object *obj)
> +{
> +    ARMCPU *cpu = ARM_CPU(obj);
> +    ARMISARegisters *isar = &cpu->isar;
> +    uint64_t t;
> +
> +    /* Armv9.0 is based on a minimum of Armv8.5. */
> +    aarch64_max_v8_tcg_initfn(obj);
> +
> +    /*
> +     * Armv9.0 does not support AArch32 except at EL0,
> +     * therefore indicate EL1 through EL3 are AArch64-only.
> +     */
> +    t = GET_IDREG(isar, ID_AA64PFR0);
> +    t = FIELD_DP64(t, ID_AA64PFR0, EL1, 1);
> +    t = FIELD_DP64(t, ID_AA64PFR0, EL2, 1);
> +    t = FIELD_DP64(t, ID_AA64PFR0, EL3, 1);
> +    SET_IDREG(isar, ID_AA64PFR0, t);
> +
> +    /* v9.0 prohibits FEAT_DoubleLock. */
> +    FIELD_DP64_IDREG(isar, ID_AA64DFR0, DOUBLELOCK, -1);
> +    FIELD_DP64_IDREG(isar, ID_AA64PFR0, RAS, 1);

Don't these two lines need to go inside the relevant
GET_IDREG...SET_IDREG blocks ?

> +    isar->dbgdevid = FIELD_DP32(isar->dbgdevid, DBGDEVID, DOUBLELOCK, 0);

...and this line is setting a field in DBGDEVID, which isn't
accessible unless we have AArch32 EL1, which v9 doesn't.

> diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
> index cc42db9e0b..0a1a5bec93 100644
> --- a/docs/system/arm/emulation.rst
> +++ b/docs/system/arm/emulation.rst
> @@ -230,7 +230,16 @@ to the `Arm Architecture Reference Manual for A-profile architecture
>  When a specific named CPU is being emulated, only those features which
>  are present in hardware for that CPU are emulated. (If a feature is
>  not in the list above then it is not supported, even if the real
> -hardware should have it.) The ``max`` CPU enables all features.
> +hardware should have it.)
> +
> +The ``max-v8`` CPU enables all of the listed Armv8-A architecture
> +extensions but none of the Armv9-A architecture extensions.
> +
> +The ``max-v9`` CPU enables all of the listed extensions except for
> +those that are prohibited by the Armv9-A architecture: FEAT_AA32EL1,
> +FEAT_AA32EL2, FEAT_AA32EL3, and FEAT_DoubleLock.
> +
> +The ``max`` CPU is an alias for ``max-v9`` under TCG emulation.

Testing, I see that qemu-arm and qemu-system-arm don't have
"max-v8" visible. I think they should.

thanks
-- PMM