Re: [PATCH v1 3/3] hw/arm/aspeed_ast2600: Wire up the UDC
Cédric Le Goater <[email protected]>
| Newsgroups | org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
On 7/3/26 09:43, Jamin Lin wrote: > Create the USB Device Controller (UDC) at 0x1e6a2000 on the AST2600 SoC: > map its registers and connect its interrupt. > > The gadget USB device is not created by the SoC. It is a separate, > user-creatable "aspeed.udc-gadget" USB device that the user plugs onto a > USB host controller's bus; it finds its controller through the "udc" > link property, e.g. > > -device aspeed.udc-gadget,udc=/machine/soc/udc > > Signed-off-by: Jamin Lin <[email protected]> > --- > hw/arm/aspeed_ast2600.c | 13 +++++++++++++ > include/hw/arm/aspeed_soc.h | 2 ++ > 2 files changed, 15 insertions(+) > > diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c > index d1f18e471a..7d97f10448 100644 > --- a/hw/arm/aspeed_ast2600.c > +++ b/hw/arm/aspeed_ast2600.c > @@ -32,6 +32,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { > [ASPEED_DEV_SPI1] = 0x1E630000, > [ASPEED_DEV_SPI2] = 0x1E631000, > [ASPEED_DEV_EHCI1] = 0x1E6A1000, > + [ASPEED_DEV_UDC] = 0x1E6A2000, > [ASPEED_DEV_EHCI2] = 0x1E6A3000, > [ASPEED_DEV_MII1] = 0x1E650000, > [ASPEED_DEV_MII2] = 0x1E650008, > @@ -113,6 +114,7 @@ static const int aspeed_soc_ast2600_irqmap[] = { > [ASPEED_DEV_SDHCI] = 43, > [ASPEED_DEV_EHCI1] = 5, > [ASPEED_DEV_EHCI2] = 9, > + [ASPEED_DEV_UDC] = 9, > [ASPEED_DEV_EMMC] = 15, > [ASPEED_DEV_GPIO] = 40, > [ASPEED_DEV_GPIO_1_8V] = 11, > @@ -214,6 +216,8 @@ static void aspeed_soc_ast2600_init(Object *obj) > TYPE_PLATFORM_EHCI); > } > > + object_initialize_child(obj, "udc", &a->udc, TYPE_ASPEED_UDC); > + > snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); > object_initialize_child(obj, "sdmc", &s->sdmc, typename); > object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), > @@ -573,6 +577,15 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) > ASPEED_DEV_EHCI1 + i)); > } > > + /* UDC - USB 2.0 Device Controller */ > + if (!sysbus_realize(SYS_BUS_DEVICE(&a->udc), errp)) { > + return; > + } > + aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&a->udc), 0, > + sc->memmap[ASPEED_DEV_UDC]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&a->udc), 0, > + aspeed_soc_ast2600_get_irq(s, ASPEED_DEV_UDC)); > + > /* SDMC - SDRAM Memory Controller */ > if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) { > return; > diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h > index 3aac144cd4..74fd83e957 100644 > --- a/include/hw/arm/aspeed_soc.h > +++ b/include/hw/arm/aspeed_soc.h > @@ -36,6 +36,7 @@ > #include "hw/gpio/aspeed_sgpio.h" > #include "hw/sd/aspeed_sdhci.h" > #include "hw/usb/hcd-ehci.h" > +#include "hw/usb/aspeed-udc.h" > #include "qom/object.h" > #include "hw/misc/aspeed_lpc.h" > #include "hw/misc/unimp.h" > @@ -138,6 +139,7 @@ struct Aspeed2600SoCState { > > A15MPPrivState a7mpcore; > ARMCPU cpu[ASPEED_CPUS_NUM]; /* XXX belong to a7mpcore */ > + AspeedUDCState udc; > }; > > #define TYPE_ASPEED2600_SOC "aspeed2600-soc" Reviewed-by: Cédric Le Goater <[email protected]> Thanks, C.