[PULL 1/4] target/arm: Fix b16b16 feature test for SME2 BFCLAMP, BFMAX, BFMIN
Peter Maydell <[email protected]> Fri, 31 Jul 2026 17:20:21 +0100
| Newsgroups | org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
From: Richard Henderson <[email protected]> These are controlled by FEAT_SVE_B16B16 not FEAT_SME_B16B16. Cc: [email protected] Fixes: bc65d2bd1cb ("target/arm: Implement SME2 Multiple and Single SVE Destructive") Fixes: 930760eb753 ("target/arm: Implement SME2 Multiple Vectors SVE Destructive") Fixes: 8b61eff8e72 ("target/arm: Implement SME2 FCLAMP, SCLAMP, UCLAMP") Signed-off-by: Richard Henderson <[email protected]> Reviewed-by: Peter Maydell <[email protected]> Signed-off-by: Peter Maydell <[email protected]> --- target/arm/tcg/translate-sme.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index dcc4690fba..0794794e3d 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -756,7 +756,7 @@ static bool do_z2z_n1_fpst(DisasContext *s, arg_z2z_en *a, return false; } /* These insns use MO_8 to encode BFloat16. */ - if (esz == MO_8 && !dc_isar_feature(aa64_sme_b16b16, s)) { + if (esz == MO_8 && !dc_isar_feature(aa64_sve_b16b16, s)) { return false; } if (!sme_sm_enabled_check(s)) { @@ -793,7 +793,7 @@ static bool do_z2z_nn_fpst(DisasContext *s, arg_z2z_en *a, if (fn == NULL) { return false; } - if (esz == MO_8 && !dc_isar_feature(aa64_sme_b16b16, s)) { + if (esz == MO_8 && !dc_isar_feature(aa64_sve_b16b16, s)) { return false; } if (!sme_sm_enabled_check(s)) { @@ -1850,7 +1850,7 @@ static bool trans_FCLAMP(DisasContext *s, arg_zzz_en *a) return false; } /* This insn uses MO_8 to encode BFloat16. */ - if (a->esz == MO_8 && !dc_isar_feature(aa64_sme_b16b16, s)) { + if (a->esz == MO_8 && !dc_isar_feature(aa64_sve_b16b16, s)) { return false; } if (!sme_sm_enabled_check(s)) { -- 2.43.0