Re: [PATCH v4 18/18] tests/functional/hexagon: enable more arch_tests cases

On 7/29/2026 6:28 PM, Brian Cain wrote:
> Add more tests from hexagon-arch-tests, enabled by QTimer device.
> 
> These exercise cache maintenance ops, l2vic, thread start/stop, tlb/mmu
> operations, and user-mode transitions.
> 
> Signed-off-by: Brian Cain <[email protected]>
> ---
>  tests/functional/hexagon/test_arch_tests.py | 32 +++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/tests/functional/hexagon/test_arch_tests.py b/tests/functional/hexagon/test_arch_tests.py
> index 2bb34f9b8dc..0834398c3b1 100755
> --- a/tests/functional/hexagon/test_arch_tests.py
> +++ b/tests/functional/hexagon/test_arch_tests.py
> @@ -58,6 +58,38 @@ def test_int_steering(self) -> None:
>          """
>          self.run_uart_test("test_int_steering")
>  
> +    def test_cache(self) -> None:
> +        """Tests cache operations: dckill/ickill, l2kill, dczeroa,
> +        dccleaninva, cache disable/enable, barriers, and dcinva/dccleana.
> +        """
> +        self.run_uart_test("test_cache")
> +
> +    def test_l2vic(self) -> None:
> +        """Tests the L2VIC interrupt controller: enable readback,
> +        interrupt type readback, VID capture, and the fast interface.
> +        """
> +        self.run_uart_test("test_l2vic")
> +
> +    def test_threads(self) -> None:
> +        """Tests hardware thread management: start/stop, MODECTL state,
> +        per-thread HTID, shared memory, wait/resume, STID priority, and
> +        SCHEDCFG/BESTWAIT readback.
> +        """
> +        self.run_uart_test("test_threads")
> +
> +    def test_tlb_mmu(self) -> None:
> +        """Tests TLB/MMU operations: write/read/probe/invalidate,
> +        global entries, multiple entries, overwrite, ASID matching,
> +        and permission checks.
> +        """
> +        self.run_uart_test("test_tlb_mmu")
> +
> +    def test_user_mode(self) -> None:
> +        """Tests user mode / privilege transitions: supervisor mode,
> +        SSR UM/IE/XE/CE/PE bits, and the trap0 user-mode exit handler.
> +        """
> +        self.run_uart_test("test_user_mode")
> +
>  
>  if __name__ == "__main__":
>      QemuSystemTest.main()

A general question on the pattern we have here.

If those tests can be compiled with hexagon-cross container, would it
make sense to add them to tcg/tests/hexagon/system directly in the future?
Hopefully will be more easy once we have meson tcg-tests, so you don't
need to add all dependencies by hand.

Regards,
Pierrick