[PATCH 0/9] disas: Updates for capstone v6
Richard Henderson <[email protected]>
| Newsgroups | org.nongnu.qemu-devel,org.nongnu.qemu-riscv |
|---|---|
| Message-ID | <[email protected]> |
Capstone v6-alpha10 is coming along nicely, and may be able to replace some of the other disassemblers that we have. Some targets (alpha, hppa, xtensa) that v6 purports to support are still in terrible shape. At least for alpha and hppa that is presumably because the LLVM support that these claim to be derived from is not yet in upstream LLVM. r~ Richard Henderson (9): target/riscv: Improve riscv_has_ext disas/capstone: Allow for cap_insn_unit > length target/riscv: Enable disassembly via capstone target/sh4: Enable disassembly via capstone target/tricore: Enable disassembly via capstone target/loongarch: Enable disassembly via capstone target/s390x: Update capstone disassembly to v6 target/m68k: Enable disassembly via capstone target/mips: Enable disassembly via capstone include/disas/capstone.h | 115 +++++++++++++++++++++++++++++++++++++-- target/riscv/cpu.h | 2 +- disas/capstone.c | 29 +++++++++- target/loongarch/cpu.c | 8 +++ target/m68k/cpu.c | 65 +++++++++++++++++++++- target/mips/cpu.c | 60 ++++++++++++++++++-- target/riscv/cpu.c | 81 ++++++++++++++++++++++++++- target/s390x/cpu.c | 4 +- target/sh4/cpu.c | 14 +++++ target/tricore/cpu.c | 31 +++++++++++ 10 files changed, 393 insertions(+), 16 deletions(-) -- 2.43.0