Re: [PATCH 3/9] target/riscv: Enable disassembly via capstone
Philippe Mathieu-Daudé <[email protected]>
| Newsgroups | org.nongnu.qemu-devel,org.nongnu.qemu-riscv |
|---|---|
| Message-ID | <[email protected]> |
On 9/8/26 03:33, Richard Henderson wrote: > In capstone v5, riscv support is spare, but v6 is pretty good. > > Signed-off-by: Richard Henderson <[email protected]> > --- > include/disas/capstone.h | 34 +++++++++++++++++ > disas/capstone.c | 19 ++++++++++ > target/riscv/cpu.c | 81 +++++++++++++++++++++++++++++++++++++++- > 3 files changed, 133 insertions(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé <[email protected]>