Re: [PATCH v3 0/3] riscv: Add K230 DW 8250-compatible UART
Bin Meng <[email protected]>
| Newsgroups | org.nongnu.qemu-devel,org.nongnu.qemu-riscv |
|---|---|
| Message-ID | <CAEUhbmWJzY4qZA6DvTKu3gbP=BEe_Byw6+cpiKEruvVCyL-jiw@mail.gmail.com> |
On Thu, Aug 13, 2026 at 6:21 PM Joel Stanley <[email protected]> wrote: > > On Sat, 8 Aug 2026 at 12:02, WX Chen <[email protected]> wrote: > > > > This series adds a QEMU model for the K230 SoC DesignWare 8250-compatible > > UART controller, wires it into the K230 SoC, and adds qtest coverage. > > > > The implementation supports the registers and features required by the > > Linux 8250_dw driver, providing an interactive shell over the serial port. > > This is a model for the same hardware as this patch: > > https://lore.kernel.org/qemu-riscv/[email protected]/ > > I'm not fussed which one we end up with in the tree, but it would be > good to name it generically so other machines can use it. > Agree. Hi Alistair, I suggest we drop the series from your riscv-to-apply.next tree and ask WX Chen to respin another version. The DesignWare series IP should be modeled separately instead of the SoC version to allow other machines to re-use the same DW IP. Regards, Bin