Re: [RFC PATCH 16/18] target/riscv: Recognize watchpoints with first/last

Philippe Mathieu-Daudé <[email protected]>
Newsgroups org.nongnu.qemu-devel,org.nongnu.qemu-arm,org.nongnu.qemu-riscv
Message-ID <[email protected]>
On 15/8/26 22:37, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <[email protected]>
> ---
>   target/riscv/tcg/cpu_helper.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/riscv/tcg/cpu_helper.c b/target/riscv/tcg/cpu_helper.c
> index 11f2654da1..3318e82ea7 100644
> --- a/target/riscv/tcg/cpu_helper.c
> +++ b/target/riscv/tcg/cpu_helper.c
> @@ -1784,8 +1784,8 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, vaddr first, vaddr last,
>            * Otherwise we'll throw a debug exception and execution
>            * will continue elsewhere.
>            */
> -        cpu_check_watchpoint(cs, address, size, MEMTXATTRS_UNSPECIFIED,
> -                             wp_access, retaddr);
> +        cpu_check_watchpoint(cs, first, last - first + 1,
> +                             MEMTXATTRS_UNSPECIFIED, wp_access, retaddr);

Maybe squash in "accel/tcg: Replace size with first/last in 
TCGCPUOps.tlb_fill" or re-order just after?
I'm confused by this single WP change in midle of PMP API ones.
Anyway,
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
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