Re: [PATCH v2 0/6] target/loongarch: Fixes for endianness problems in vector instruction emulation

Ping?

This should be picked up for qemu-stable too, since this patchset makes
basic programs work on loong64-on-s390x for example.

Thanks,

/mjt

On 7/6/26 23:02, Miao Wang via B4 Relay wrote:
> The current implementation of vector instruction emulation in loongarch
> target works illy on big endianness hosts. It can be reproduced using
> the test cases from gcc [1]. One can cross-compile the target
> loongarch64-linux-user for s390x and use qemu-s390x to run the compiled
> qemu to test loongarch64 emulation on big endian hosts.
> 
> Possible reproduce steps are:
> 
> 1. Install s390x cross toolchains and qemu-s390x
> 2. Compile qemu using ./configure --target-list=loongarch64-linux-user --cross-prefix=s390x-linux-gnu-
> 3. Install loongarch64 cross toolchains to compile the test cases. To
>     get an accurate result, the test cases should be compiled using -O0.
>     To make the error output of the test cases readable and meaningful,
>     printf() should be replaced with a version without any vectorization
>     optimizations, since the endianness problems will prevent printf()
>     with lsx optimizations from working correctly
> 4. Use qemu-s390x ./qemu-loongarch64 /path/to/test_case.exe to test the
>     cases on big endianness hosts.
> 
> With this patch series, all the tests in [1] can pass.
> 
> [1]: under gcc/testsuite/gcc.target/loongarch/vector in the gcc source
> 
> Signed-off-by: Miao Wang <[email protected]>
> ---
> Changes in v2:
> - Use QEMU_ALIGNED(128) on the whole VReg struct according to Philippe's
>    suggestion.
> - Update Fixes: tag in the first patch.
> - Link to v1: https://lore.kernel.org/qemu-devel/[email protected]
> 
> ---
> Miao Wang (6):
>        target/loongarch: make VReg aligned to 16 bytes
>        target/loongarch: Fix offset calculation in vector registers
>        target/loongarch: gen_vreplve: Fix offset calculation
>        target/loongarch: gen_xvreplve0: Fix elem0 offset calculation
>        target/loongarch: do_vldrepl_vl: Fix endianness when reading from guest memory
>        target/loongarch: vstelm: Fix reading from vector registers
> 
>   target/loongarch/cpu.h                          |  2 +-
>   target/loongarch/tcg/insn_trans/trans_vec.c.inc | 39 +++++++++++++------------
>   target/loongarch/tcg/translate.c                |  6 ++--
>   3 files changed, 25 insertions(+), 22 deletions(-)
> ---
> base-commit: 30e8a06b64aa58a3990ba39cb5d09531e7d265e0
> change-id: 20260701-loong64-be-adf8a15675f1
> 
> Best regards,