Re: [PATCH v2 0/7] target/ppc: PPC ISA 2.07 flag cleanup and updates

Hi Chinmay,

On 20/08/26 7:56 pm, Chinmay Rath wrote:
> While working with some PPC instructions from a ISA 2.07 POV, I observed
> the following :
> 
> 1. Unlike ISA versions 2.05, 3.0 and 3.1 which have one specific flag
> for usage in the insns_flags2 field in the CPUPPCState struct, ISA 2.07
> and 2.06 have multiple flags. Upon further investigation, I see that
> during CPU intialization (POWER 8+), all those variations of the ISA 2.07
> flags are only ever used all together. There is no instance in the code
> where a CPU is initialzed in a more granular level, using only a subset
> of the ISA 2.07 flag variations.
> This patch series hence consolidates the different 2.07 flags, and frees
> up bits in the insns_flags2 field for future use. I intend to do the
> same analysis for the ISA 2.06 flags as well.
> 
> 2. The "Summary of changes in Power ISA 2.07B" section in the ISA
> version 2.07B mentions : "The icbt instruction has been moved from
> the Embedded category to the Base category."
> This change has not been incorporated in the QEMU code resulting in
> illegal instruction exception upon encountering ICBT instruction in
> Power VMs where it should be recognized. Hence adding the necessary
> flag to the instruction. Also correcting the invalid mask for the
> decoding as per the ISA.
> 
> This series is based on top of the patches from another series that I
> had posted :
> [A] : https://lore.kernel.org/qemu-devel/[email protected]/

Thanks for these improvements.
I see the pre-req decodetree series is still undergoing review by Glenn
and others while this is reviewed already, therefore this needs to wait
a little more.

regards,
Harsh
> 
> Link to Gitlab CI with patches :
> https://gitlab.com/rathc/qemu/-/pipelines/2776338293
> 
> Changes in v2 :
> -Retained all 'Reviewed-by's and 'Tested-by's received.
> 
> -In patch 2: Change instruction flag in BCTAR instruction.
> The above series [A] now incorpates the following review comment
> received on its respective RFC series :
> https://lore.kernel.org/qemu-devel/[email protected]/
> Due to this. Doing the necessary change in patch 2.
> 
> 
> Chinmay Rath (7):
>    target/ppc: Replace PPC2_VSX207 flag with PPC2_ISA207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_BCTAR_ISA207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_LSQ_ISA207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_ALTIVEC_207
>    target/ppc: Use PPC2_ISA207 instead of PPC2_ISA207S
>    target/ppc: Reorder PPC2 flags
>    target/ppc: Add ICBT support for ISA version 2.07
> 
>   hw/ppc/spapr_caps.c                           |   2 +-
>   linux-user/ppc/elfload.c                      |   6 +-
>   target/ppc/cpu.h                              |  38 +++----
>   target/ppc/cpu_init.c                         |   6 +-
>   target/ppc/cpu_init.h                         |   7 +-
>   target/ppc/tcg-excp_helper.c                  |   8 +-
>   target/ppc/translate.c                        |  10 +-
>   target/ppc/translate/bhrb-impl.c.inc          |   4 +-
>   target/ppc/translate/branch-impl.c.inc        |   4 +-
>   target/ppc/translate/fixedpoint-impl.c.inc    |   4 +-
>   target/ppc/translate/fp-impl.c.inc            |   4 +-
>   .../ppc/translate/processor-ctrl-impl.c.inc   |   8 +-
>   target/ppc/translate/vmx-impl.c.inc           | 102 +++++++++---------
>   target/ppc/translate/vmx-ops.c.inc            |  18 ++--
>   target/ppc/translate/vsx-impl.c.inc           |  56 +++++-----
>   target/ppc/translate/vsx-ops.c.inc            |  24 ++---
>   16 files changed, 143 insertions(+), 158 deletions(-)
>