Re: [PATCH v3] riscv/virt: Add optional UART1

Alistair Francis <[email protected]>
Newsgroups org.nongnu.qemu-devel,org.nongnu.qemu-riscv
Message-ID <[email protected]>
On Thu, 2026-08-20 at 15:08 +0930, Joel Stanley wrote:
> On Sat, 18 Jul 2026 at 11:46, Yanfeng Liu <[email protected]> wrote:
> > --- a/docs/system/riscv/virt.rst
> > +++ b/docs/system/riscv/virt.rst
> > @@ -16,7 +16,7 @@ The ``virt`` machine supports the following
> > devices:
> >  * Core Local Interruptor (CLINT)
> >  * Platform-Level Interrupt Controller (PLIC)
> >  * CFI parallel NOR flash memory
> > -* 1 NS16550 compatible UART
> > +* Either 1 or 2 NS16550 compatible UARTs
> >  * 1 Google Goldfish RTC
> >  * 1 SiFive Test device
> >  * 8 virtio-mmio transport devices
> > @@ -27,6 +27,9 @@ The hypervisor extension has been enabled for the
> > default CPU, so virtual
> >  machines with hypervisor extension can simply be used without
> > explicitly
> >  declaring.
> > 
> > +The second UART only exists if a backend is configured explicitly
> > (e.g.
> > +with a second `-serial` command line option).
> 
> This breaks the docs build. I think you want ``-serial``.

That should be fixed in my tree already though

Alistair

> 
> Cheers,
> 
> Joel
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