Re: [PATCH v3 47/51] accel/tcg: Use addr/last in tlb_flush_range_locked

On 10/7/26 22:53, Richard Henderson wrote:
> Change from addr/len to addr/last in the implementation.
> 
> Signed-off-by: Richard Henderson <[email protected]>
> ---
>   accel/tcg/cputlb.c | 71 +++++++++++++++++++++++++---------------------
>   1 file changed, 38 insertions(+), 33 deletions(-)
> 
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index c8ba727859..2c0f7bed52 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -655,7 +655,7 @@ void tlb_flush_page_all_cpus_synced(CPUState *src, vaddr addr)
>   }
>   
>   static void tlb_flush_range_locked(CPUState *cpu, int midx,
> -                                   vaddr addr, vaddr len,
> +                                   vaddr addr, vaddr last,
>                                      unsigned bits)
>   {
>       CPUTLBDesc *d = &cpu->neg.tlb.d[midx];
> @@ -669,13 +669,13 @@ static void tlb_flush_range_locked(CPUState *cpu, int midx,
>        * TODO: Perhaps allow bits to be a few bits less than the size.
>        * For now, just flush the entire TLB.
>        *
> -     * If @len is larger than the tlb size, then it will take longer to
> +     * If [addr:last] is larger than the tlb size, then it will take longer to
>        * test all of the entries in the TLB than it will to flush it all.
>        */

[start:last] used in include/user/page-protection.h sounds clearer TBH.