Re: [PATCH 3/3] disas/riscv.c: Correct indent for checkpatch

Frédéric Pétrot <[email protected]>
Newsgroups org.nongnu.qemu-riscv,org.nongnu.qemu-devel
Message-ID <[email protected]>
Thanks Daniel for the quick review.

The style issue is (I am afraid) due to your patch 9273cda7229 (indent of 3), 
but in your defense checkpatch didn't not catch it until I added the 'if ...'.

If that's ok with you, I'll send a v2 that first corrects the style issue
on the switch and then adds the rest.

Cheers,
Frédéric

On 7/16/26 15:21, Daniel Henrique Barboza wrote:
> 
> 
> On 7/15/2026 4:07 PM, [email protected] wrote:
>> From: Frédéric Pétrot <[email protected]>
>>
>> Trival indentation patch on the cbo/lq relevant code.
>>
>> Signed-off-by: Frédéric Pétrot <[email protected]>
>> ---
> 
> As I said in patch 2 this patch is fixing style issues that patch 2 itself
> is introducing.  We want this patch squashed into patch 2.
> 
> 
> Thanks,
> Daniel
> 
>>   disas/riscv.c | 38 +++++++++++++++++++-------------------
>>   1 file changed, 19 insertions(+), 19 deletions(-)
>>
>> diff --git a/disas/riscv.c b/disas/riscv.c
>> index 831ff526ad..27bf4d9954 100644
>> --- a/disas/riscv.c
>> +++ b/disas/riscv.c
>> @@ -2887,25 +2887,25 @@ static void decode_inst_opcode(rv_decode *dec, rv_isa 
>> isa)
>>               case 0: op = rv_op_fence; break;
>>               case 1: op = rv_op_fence_i; break;
>>               case 2:
>> -               /*
>> -                * 'lq' shares the "(...) 010 ..... 0001111" opcode space
>> -                * with 'cbo' insns, but assumes rd != 0.
>> -                *
>> -                * cbo_inval  0000000 00000 ..... 010 00000 0001111
>> -                * cbo_clean  0000000 00001 ..... 010 00000 0001111
>> -                * cbo_flush  0000000 00010 ..... 010 00000 0001111
>> -                * cbo_zero   0000000 00100 ..... 010 00000 0001111
>> -                */
>> -               if ((inst >> 7) & 0b11111) {
>> -                  op = rv_op_lq;
>> -               } else {
>> -                  switch (inst >> 20) {
>> -                  case 0: op = rv_op_cbo_inval; break;
>> -                  case 1: op = rv_op_cbo_clean; break;
>> -                  case 2: op = rv_op_cbo_flush; break;
>> -                  case 4: op = rv_op_cbo_zero; break;
>> -                  }
>> -               }
>> +                /*
>> +                 * 'lq' shares the "(...) 010 ..... 0001111" opcode space
>> +                 * with 'cbo' insns, but assumes rd != 0.
>> +                 *
>> +                 * cbo_inval  0000000 00000 ..... 010 00000 0001111
>> +                 * cbo_clean  0000000 00001 ..... 010 00000 0001111
>> +                 * cbo_flush  0000000 00010 ..... 010 00000 0001111
>> +                 * cbo_zero   0000000 00100 ..... 010 00000 0001111
>> +                 */
>> +                if ((inst >> 7) & 0b11111) {
>> +                    op = rv_op_lq;
>> +                } else {
>> +                    switch (inst >> 20) {
>> +                    case 0: op = rv_op_cbo_inval; break;
>> +                    case 1: op = rv_op_cbo_clean; break;
>> +                    case 2: op = rv_op_cbo_flush; break;
>> +                    case 4: op = rv_op_cbo_zero; break;
>> +                    }
>> +                }
>>               }
>>               break;
>>           case 4:
> 
> 
> 
> 
> 

-- 
+---------------------------------------------------------------------------+
| Frédéric Pétrot,                        Pr. Grenoble INP-UGA@Ensimag/TIMA |
| Mob/Pho: +33 6 74 57 99 65/+33 4 76 57 48 70      Ad augusta  per angusta |
| http://tima.univ-grenoble-alpes.fr [email protected] |
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