[qemu-riscv] Question: RISC-V CoVE (Confidential VM Ex tension) support in QEMU-KVM

"段宝龙(布鲁尔)" <[email protected]> Fri, 24 Jul 2026 15:27:34 +0800
Newsgroups org.nongnu.qemu-riscv,org.nongnu.qemu-devel
Message-ID <2c6224d8-b22e-45a6-9a19-112f9818f185.duanbaolong.dbl@alibaba-inc.com>
Hi all,
We are working on RISC-V CoVE (Confidential VM Extension, defined by the AP-TEE specification) support, and we have prepared patches to launch Trusted VMs (TVMs) via QEMU-KVM on CoVE-capable hardware.
Before we submit the patch series, we have a few questions:

 * 
Has anyone already submitted or is working on CoVE support for QEMU? We want to avoid duplicating effort.

 * 
Our patches are based on the current master branch. Is master the right target, or is there a preferred feature branch or subsystem tree (e.g. riscv-to-apply.next) we should base on?

 * 
Any preferences on how to structure the series? Our changes touch target/riscv KVM code for TVM creation, and vCPU lifecycle management.
For reference, CoVE is the RISC-V equivalent of AMD SEV / Intel TDX, specified at: https://github.com/riscv-non-isa/riscv-ap-tee <https://github.com/riscv-non-isa/riscv-ap-tee >
Thanks for any guidance!
Best regards,
Baolong Duan