Re: [PATCH v8 00/11] target/riscv: Implement Smsdid and Smmpt extension

On Fri, Jul 24, 2026 at 1:33=E2=80=AFAM LIU Zhiwei <[email protected]=
a.com> wrote:
>
> This patch set introduces support for the RISC-V Smsdid and Smmpt
> (Supervisor Domain Identifier and Memory Protection Table) extensions
> v0.4.9(https://github.com/riscv/riscv-smmtt/releases/tag/v0.4.9).
> Smmpt provides a hardware mechanism for fine-grained memory protection,
> checked after address translation, which is particularly useful for
> supervisor-level sandboxing and security monitoring.
>
> The rfc patch set:
> https://mail.gnu.org/archive/html/qemu-riscv/2025-09/msg00216.html
>
> Rahul Pathak is working on SMMPT OpenSBI support -
> https://lists.infradead.org/pipermail/opensbi/2026-July/010235.html
>
> based on his QEMU SMMPT branch -
> https://github.com/pathakraul/qemu/tree/rpathak_smmpt_v1
>
> As we all agree -
> https://patchew.org/QEMU/[email protected]=
ba.com/
> , we will collaborate on this work and not duplicate efforts. Rahul will
> focus on OpenSBI upstream and I will update the QEMU patch set to v8.
>
> Xiangyi will review the OpenSBI SMMPT patch set and may collaborate to
> upstream the other parts, such as SMSDIA and IOMPT.
>
> v7->v8:
>     1. Update the mfence.pa and minval.pa instruction encodings to match =
the
>        upstream riscv-opcodes definition
>        (https://github.com/riscv/riscv-opcodes/pull/389/): mfence.pa now =
uses
>        funct7=3D0b0011001 and minval.pa uses funct7=3D0b0011011. The deco=
der,
>        disassembler and the system test are updated accordingly.

I have posted the updated OpenSBI SMSDID+SMMPT V2 series
which aligns with this series version

https://lists.infradead.org/pipermail/opensbi/2026-July/010288.html