Re: [PATCH 4/9] target/sh4: Enable disassembly via capstone
Philippe Mathieu-Daudé <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
On 9/8/26 03:33, Richard Henderson wrote: > Signed-off-by: Richard Henderson <[email protected]> > --- > include/disas/capstone.h | 7 +++++++ > target/sh4/cpu.c | 14 ++++++++++++++ > 2 files changed, 21 insertions(+) > @@ -167,10 +168,23 @@ static void superh_cpu_reset_hold(Object *obj, ResetType type) > static void superh_cpu_disas_set_info(const CPUState *cpu, > disassemble_info *info) > { > + const CPUSH4State *env = cpu_env((CPUState *)cpu); > + > info->endian = TARGET_BIG_ENDIAN ? BFD_ENDIAN_BIG > : BFD_ENDIAN_LITTLE; > info->mach = bfd_mach_sh4; > info->print_insn = print_insn_sh; > + > + info->cap_arch = CS_ARCH_SH; > + info->cap_insn_unit = 2; > + info->cap_insn_split = 2; > + /* > + * Possible capstone bug: the isa levels are not additive: > + * least significant bit wins, so SH4 overrides SH4A. > + * Work around by settiing one or the other but not both. "setting" > + */ > + info->cap_mode = CS_MODE_SHFPU > + | (env->features & SH_FEATURE_SH4A ? CS_MODE_SH4A : CS_MODE_SH4); > } Reviewed-by: Philippe Mathieu-Daudé <[email protected]>