Re: [PATCH 0/2] target/riscv: Fix seed CSR sign extension

On Sun, 2026-08-02 at 14:31 +0300, Ivan Efremov wrote:
> The seed CSR value on RV64 was sign extended while converting to
> target_ulong.
> 
> The first patch makes SEED_OPST_* unsigned.
> The second patch adds qtest to check that upper 32 bits are zero.
> 
> Tests ran:
> - riscv-csr-test
> - make check: 324 passed, 11 skipped
> - RISC-V Zkr-00 architectural test

Thanks!

Applied to riscv-to-apply.next

Alistair

> 
> Ivan Efremov (2):
>   target/riscv: Fix seed CSR sign extension
>   tests/qtest: Add seed CSR zero extension test
> 
>  target/riscv/cpu_bits.h      | 10 +++++-----
>  tests/qtest/riscv-csr-test.c | 26 ++++++++++++++++++++++++++
>  2 files changed, 31 insertions(+), 5 deletions(-)