Re: [PATCH v2 2/6] target/riscv/cpu: List one implied-ext rule per line

On 8/12/2026 2:44 PM, Max Chou wrote:
> Every entry added to riscv_multi_ext_implied_rules[] currently has to
> reflow whatever line it lands on, since entries are packed several
> per line. List one rule per line instead so future additions are a
> pure append.
> 
> Suggested-by: Daniel Henrique Barboza <[email protected]>
> Signed-off-by: Max Chou <[email protected]>
> ---

Reviewed-by: Daniel Henrique Barboza <[email protected]>

>   target/riscv/cpu.c | 58 +++++++++++++++++++++++++++++++++++-----------
>   1 file changed, 44 insertions(+), 14 deletions(-)
> 
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index e643d7c7af7..fffb92ff110 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -2818,20 +2818,50 @@ RISCVCPUImpliedExtsRule *riscv_misa_ext_implied_rules[] = {
>   };
>   
>   RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[] = {
> -    &ZCB_IMPLIED, &ZCD_IMPLIED, &ZCE_IMPLIED,
> -    &ZCF_IMPLIED, &ZCMP_IMPLIED, &ZCMT_IMPLIED,
> -    &ZDINX_IMPLIED, &ZFA_IMPLIED, &ZFBFMIN_IMPLIED,
> -    &ZFH_IMPLIED, &ZFHMIN_IMPLIED, &ZFINX_IMPLIED,
> -    &ZHINX_IMPLIED, &ZHINXMIN_IMPLIED, &ZICNTR_IMPLIED,
> -    &ZIHPM_IMPLIED, &ZK_IMPLIED, &ZKN_IMPLIED,
> -    &ZKS_IMPLIED, &ZVBB_IMPLIED, &ZVE32F_IMPLIED,
> -    &ZVE32X_IMPLIED, &ZVE64D_IMPLIED, &ZVE64F_IMPLIED, &ZVE64X_IMPLIED,
> -    &ZVFBFA_IMPLIED, &ZVFBFMIN_IMPLIED, &ZVFBFWMA_IMPLIED,
> -    &ZVFH_IMPLIED, &ZVFHMIN_IMPLIED, &ZVKN_IMPLIED,
> -    &ZVKNC_IMPLIED, &ZVKNG_IMPLIED, &ZVKNHB_IMPLIED,
> -    &ZVKS_IMPLIED,  &ZVKSC_IMPLIED, &ZVKSG_IMPLIED, &SHA_IMPLIED,
> -    &SSCFG_IMPLIED, &SUPM_IMPLIED, &SSPM_IMPLIED, &SMCTR_IMPLIED,
> -    &SSCTR_IMPLIED, &SSSTATEEN_IMPLIED,
> +    &ZCB_IMPLIED,
> +    &ZCD_IMPLIED,
> +    &ZCE_IMPLIED,
> +    &ZCF_IMPLIED,
> +    &ZCMP_IMPLIED,
> +    &ZCMT_IMPLIED,
> +    &ZDINX_IMPLIED,
> +    &ZFA_IMPLIED,
> +    &ZFBFMIN_IMPLIED,
> +    &ZFH_IMPLIED,
> +    &ZFHMIN_IMPLIED,
> +    &ZFINX_IMPLIED,
> +    &ZHINX_IMPLIED,
> +    &ZHINXMIN_IMPLIED,
> +    &ZICNTR_IMPLIED,
> +    &ZIHPM_IMPLIED,
> +    &ZK_IMPLIED,
> +    &ZKN_IMPLIED,
> +    &ZKS_IMPLIED,
> +    &ZVBB_IMPLIED,
> +    &ZVE32F_IMPLIED,
> +    &ZVE32X_IMPLIED,
> +    &ZVE64D_IMPLIED,
> +    &ZVE64F_IMPLIED,
> +    &ZVE64X_IMPLIED,
> +    &ZVFBFA_IMPLIED,
> +    &ZVFBFMIN_IMPLIED,
> +    &ZVFBFWMA_IMPLIED,
> +    &ZVFH_IMPLIED,
> +    &ZVFHMIN_IMPLIED,
> +    &ZVKN_IMPLIED,
> +    &ZVKNC_IMPLIED,
> +    &ZVKNG_IMPLIED,
> +    &ZVKNHB_IMPLIED,
> +    &ZVKS_IMPLIED,
> +    &ZVKSC_IMPLIED,
> +    &ZVKSG_IMPLIED,
> +    &SHA_IMPLIED,
> +    &SSCFG_IMPLIED,
> +    &SUPM_IMPLIED,
> +    &SSPM_IMPLIED,
> +    &SMCTR_IMPLIED,
> +    &SSCTR_IMPLIED,
> +    &SSSTATEEN_IMPLIED,
>       NULL
>   };
>