[PATCH v2 36/52] disas/riscv: Skip post-processing of illegal insns
Richard Henderson <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Signed-off-by: Richard Henderson <[email protected]> --- disas/riscv.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index bc86cb866a..75c2fa11e6 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5321,12 +5321,14 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst, } } } - if (!op) { + + if (op) { + decode_inst_operands(&dec, isa, op); + op = decode_inst_lift_pseudo(&dec, op); + } else { op = &rvi_opcode_data[rv_op_illegal]; } - decode_inst_operands(&dec, isa, op); - op = decode_inst_lift_pseudo(&dec, op); return format_inst(24, &dec, op); } -- 2.43.0