[PATCH v2 49/52] disas/riscv: Tidy decode of c.mop.n
Richard Henderson <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Merge nested if's. Reuse operand_cmop_imm for zicfiss decode. Return pointers directly. Reviewed-by: Alistair Francis <[email protected]> Signed-off-by: Richard Henderson <[email protected]> --- disas/riscv.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/disas/riscv.c b/disas/riscv.c index 39235e5bc7..197eaa43b1 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -1027,18 +1027,17 @@ static const rv_opcode_data *decode_inst_opcode(rv_decode *dec, rv_isa isa) break; case 2: op = rv_op_c_li; break; case 3: - if (dec->cfg && dec->cfg->ext_zcmop) { - if ((((inst >> 2) & 0b111111) == 0b100000) && - (((inst >> 11) & 0b11) == 0b0)) { - unsigned int cmop_code = 0; - cmop_code = ((inst >> 8) & 0b111); - op = rv_op_c_mop; - if (dec->cfg->ext_zicfiss) { - op = (cmop_code == 0) ? rv_op_c_sspush : op; - op = (cmop_code == 2) ? rv_op_c_sspopchk : op; + if (dec->cfg + && dec->cfg->ext_zcmop + && ((inst >> 2) & 0b111111) == 0b100000 + && ((inst >> 11) & 0b11) == 0) { + if (dec->cfg->ext_zicfiss) { + switch (operand_cmop_imm(inst)) { + case 1: return &rvi_opcode_data[rv_op_c_sspush]; + case 5: return &rvi_opcode_data[rv_op_c_sspopchk]; } - break; } + return &rvi_opcode_data[rv_op_c_mop]; } if (inst & ((1 << 12) | (0x1f << 2))) { switch ((inst >> 7) & 0b11111) { -- 2.43.0