Re: [PATCH v3 0/5] hw/riscv: Add K230 DWC SSI Standard PIO support

Kangjie Huang <[email protected]> 于2026年8月9日周日 02:30写道：
>
> Testing:
>
> * Built qemu-system-riscv64 and the K230 DWC SSI qtest target.
> * Ran all 14 K230 DWC SSI qtests, including Standard PIO modes, register
>   contracts, interrupts and PLIC routing, and Standard SPI NOR reads.
> * Standard 1-1-1 transfers were also exercised manually through the K230
>   SDK U-Boot and Linux SPI paths against the attached flash.
> * git diff --check passed.
> * checkpatch.pl reported no code errors; its MAINTAINERS coverage warnings
>   are expected because this series does not modify MAINTAINERS.
>
> Suggested-by: Bin Meng <[email protected]>
> Suggested-by: Chao Liu <[email protected]>
> Suggested-by: Anirudh Srinivasan <[email protected]>

Hi Bin, Chao, and Anirudh,

  Just to clarify, I added the Suggested-by tags in this patch based on the
 concrete suggestions during the v1v2 review. None of the tags was explicitly
 provided by you. Sorry for any confusion this may have caused.

  Thanks again for your suggestions. Looking forward to your reviews!

  Best regards,
  Kangjie