[PATCH 17/23] target/riscv: Pass MemOpIdx to vext_ldst_us

Use mmu data passed in with VDATA.

Signed-off-by: Richard Henderson <[email protected]>
---
 target/riscv/tcg/vector_helper.c | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/target/riscv/tcg/vector_helper.c b/target/riscv/tcg/vector_helper.c
index 178ed32429..5ead4cd6fe 100644
--- a/target/riscv/tcg/vector_helper.c
+++ b/target/riscv/tcg/vector_helper.c
@@ -158,6 +158,19 @@ static inline void vext_set_elem_mask(void *v0, int index,
     ((uint64_t *)v0)[idx] = deposit64(old, pos, 1, value);
 }
 
+static inline MemOpIdx vext_oi(uint32_t desc, MemOp memop)
+{
+    uint32_t data = simd_data(desc);
+
+    if (FIELD_EX32(simd_data(desc), VDATA, BSWAP)) {
+        memop |= MO_BSWAP;
+    }
+    if (FIELD_EX32(simd_data(desc), VDATA, ALIGN)) {
+        memop |= MO_ALIGN;
+    }
+    return make_memop_idx(memop, FIELD_EX32(data, VDATA, MEM_IDX));
+}
+
 static inline MemOpIdx vext_make_memop_idx(CPURISCVState *env, size_t size)
 {
     int mmu_idx = riscv_env_mmu_index(env, false);
@@ -412,12 +425,12 @@ vext_ldst_us(void *vd, target_ulong base, CPURISCVState *env,
              uint32_t max_elems, bool vma,
              vext_ldst_elem_fn_tlb *ldst_tlb,
              vext_ldst_elem_fn_host *ldst_host,
-             uintptr_t ra, bool is_load)
+             uintptr_t ra, bool is_load, MemOpIdx oi)
 {
     target_ulong elems, addr, last, last_in_page, page_split;
     uint32_t esz = 1 << log2_esz;
     uint32_t msize = nf * esz;
-    int mmu_index = riscv_env_mmu_index(env, false);
+    int mmu_index = get_mmuidx(oi);
     MMUAccessType access_type = is_load ? MMU_DATA_LOAD : MMU_DATA_STORE;
     uint32_t i = env->vstart;
     void *host;
@@ -515,7 +528,8 @@ vext_ldst_us_desc(void *vd, target_ulong base, CPURISCVState *env,
 {
     vext_ldst_us(vd, base, env, log2_esz, vext_nf(desc), evl,
                  vext_max_elems(desc, log2_esz), vext_vma(desc),
-                 ldst_tlb, ldst_host, ra, is_load);
+                 ldst_tlb, ldst_host, ra, is_load,
+                 vext_oi(desc, log2_esz));
 }
 
 /*
@@ -958,7 +972,8 @@ vext_ldst_whole(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
     uint32_t evl = (riscv_cpu_cfg(env)->vlenb * vext_nf(desc)) >> log2_esz;
 
     vext_ldst_us(vd, base, env, log2_esz, 1, evl, evl, false,
-                 ldst_tlb, ldst_host, ra, is_load);
+                 ldst_tlb, ldst_host, ra, is_load,
+                 vext_oi(desc, log2_esz));
 }
 
 #define GEN_VEXT_LD_WHOLE(NAME, ETYPE, LOAD_FN_TLB, LOAD_FN_HOST)   \
-- 
2.43.0