[PATCH 23/23] target/riscv: Drop v0 argument from gen_helper_ldst_index
Richard Henderson <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Since we're also passing env, v0 is always env->vreg. Signed-off-by: Richard Henderson <[email protected]> --- target/riscv/helper.h | 64 ++++++++++----------- target/riscv/tcg/vector_helper.c | 15 ++--- target/riscv/tcg/insn_trans/trans_rvv.c.inc | 17 ++---- 3 files changed, 46 insertions(+), 50 deletions(-) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 82a478962b..96fb2347df 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -188,38 +188,38 @@ DEF_HELPER_5(vsse8_v, void, ptr, tl, tl, env, i32) DEF_HELPER_5(vsse16_v, void, ptr, tl, tl, env, i32) DEF_HELPER_5(vsse32_v, void, ptr, tl, tl, env, i32) DEF_HELPER_5(vsse64_v, void, ptr, tl, tl, env, i32) -DEF_HELPER_6(vlxei8_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei8_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei8_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei8_64_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei16_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei16_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei16_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei16_64_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei32_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei32_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei32_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei32_64_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei64_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei64_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei64_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vlxei64_64_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei8_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei8_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei8_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei8_64_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei16_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei16_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei16_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei16_64_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei32_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei32_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei32_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei32_64_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei64_8_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei64_16_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei64_32_v, void, ptr, ptr, tl, ptr, env, i32) -DEF_HELPER_6(vsxei64_64_v, void, ptr, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei8_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei8_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei8_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei8_64_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei16_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei16_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei16_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei16_64_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei32_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei32_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei32_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei32_64_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei64_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei64_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei64_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vlxei64_64_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei8_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei8_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei8_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei8_64_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei16_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei16_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei16_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei16_64_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei32_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei32_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei32_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei32_64_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei64_8_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei64_16_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei64_32_v, void, ptr, tl, ptr, env, i32) +DEF_HELPER_5(vsxei64_64_v, void, ptr, tl, ptr, env, i32) DEF_HELPER_4(vle8ff_v, void, ptr, tl, env, i32) DEF_HELPER_4(vle16ff_v, void, ptr, tl, env, i32) DEF_HELPER_4(vle32ff_v, void, ptr, tl, env, i32) diff --git a/target/riscv/tcg/vector_helper.c b/target/riscv/tcg/vector_helper.c index 354c0b0da5..b7b3805a6d 100644 --- a/target/riscv/tcg/vector_helper.c +++ b/target/riscv/tcg/vector_helper.c @@ -601,12 +601,13 @@ GEN_VEXT_GET_INDEX_ADDR(idx_w, uint32_t, H4) GEN_VEXT_GET_INDEX_ADDR(idx_d, uint64_t, H8) static void -vext_ldst_index(void *vd, void *v0, target_ulong base, +vext_ldst_index(void *vd, target_ulong base, void *vs2, CPURISCVState *env, uint32_t desc, vext_get_index_addr get_index_addr, vext_ldst_elem_fn_tlb *ldst_elem, uint32_t log2_esz, uintptr_t ra) { + void *v0 = env->vreg; uint32_t nf = vext_nf(desc); uint32_t vm = vext_vm(desc); uint32_t max_elems = vext_max_elems(desc, log2_esz); @@ -638,10 +639,10 @@ vext_ldst_index(void *vd, void *v0, target_ulong base, } #define GEN_VEXT_LD_INDEX(NAME, ETYPE, INDEX_FN, LOAD_FN) \ -QEMU_FLATTEN void HELPER(NAME)(void *vd, void *v0, target_ulong base, \ - void *vs2, CPURISCVState *env, uint32_t desc) \ +QEMU_FLATTEN void HELPER(NAME)(void *vd, target_ulong base, void *vs2, \ + CPURISCVState *env, uint32_t desc) \ { \ - vext_ldst_index(vd, v0, base, vs2, env, desc, INDEX_FN, \ + vext_ldst_index(vd, base, vs2, env, desc, INDEX_FN, \ LOAD_FN, ctzl(sizeof(ETYPE)), GETPC()); \ } @@ -663,10 +664,10 @@ GEN_VEXT_LD_INDEX(vlxei64_32_v, int32_t, idx_d, lde_w_tlb) GEN_VEXT_LD_INDEX(vlxei64_64_v, int64_t, idx_d, lde_d_tlb) #define GEN_VEXT_ST_INDEX(NAME, ETYPE, INDEX_FN, STORE_FN) \ -QEMU_FLATTEN void HELPER(NAME)(void *vd, void *v0, target_ulong base, \ - void *vs2, CPURISCVState *env, uint32_t desc) \ +QEMU_FLATTEN void HELPER(NAME)(void *vd, target_ulong base, void *vs2, \ + CPURISCVState *env, uint32_t desc) \ { \ - vext_ldst_index(vd, v0, base, vs2, env, desc, INDEX_FN, \ + vext_ldst_index(vd, base, vs2, env, desc, INDEX_FN, \ STORE_FN, ctzl(sizeof(ETYPE)), GETPC()); \ } diff --git a/target/riscv/tcg/insn_trans/trans_rvv.c.inc b/target/riscv/tcg/insn_trans/trans_rvv.c.inc index 5e352dbf41..4556c644cc 100644 --- a/target/riscv/tcg/insn_trans/trans_rvv.c.inc +++ b/target/riscv/tcg/insn_trans/trans_rvv.c.inc @@ -975,33 +975,28 @@ GEN_VEXT_TRANS(vsse64_v, MO_64, rnfvm, st_stride_op, st_stride_check) /* *** index load and store */ -typedef void gen_helper_ldst_index(TCGv_ptr, TCGv_ptr, TCGv, - TCGv_ptr, TCGv_env, TCGv_i32); +typedef void gen_helper_ldst_index(TCGv_ptr, TCGv, TCGv_ptr, + TCGv_env, TCGv_i32); static bool ldst_index_trans(uint32_t vd, uint32_t rs1, uint32_t vs2, uint32_t data, gen_helper_ldst_index *fn, DisasContext *s) { - TCGv_ptr dest, mask, index; - TCGv base; + TCGv_ptr dest = tcg_temp_new_ptr(); + TCGv_ptr index = tcg_temp_new_ptr(); + TCGv base = get_gpr(s, rs1, EXT_NONE); TCGv_i32 desc; - dest = tcg_temp_new_ptr(); - mask = tcg_temp_new_ptr(); - index = tcg_temp_new_ptr(); - base = get_gpr(s, rs1, EXT_NONE); - data = vdata_add_memopidx(s, data); desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(index, tcg_env, vreg_ofs(s, vs2)); - tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0)); mark_vs_dirty(s); - fn(dest, mask, base, index, tcg_env, desc); + fn(dest, base, index, tcg_env, desc); finalize_rvv_inst(s); return true; -- 2.43.0