[RFC PATCH 16/18] target/riscv: Recognize watchpoints with first/last

Richard Henderson <[email protected]>
Newsgroups org.nongnu.qemu-riscv,org.nongnu.qemu-arm,org.nongnu.qemu-devel
Message-ID <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
---
 target/riscv/tcg/cpu_helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/riscv/tcg/cpu_helper.c b/target/riscv/tcg/cpu_helper.c
index 11f2654da1..3318e82ea7 100644
--- a/target/riscv/tcg/cpu_helper.c
+++ b/target/riscv/tcg/cpu_helper.c
@@ -1784,8 +1784,8 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, vaddr first, vaddr last,
          * Otherwise we'll throw a debug exception and execution
          * will continue elsewhere.
          */
-        cpu_check_watchpoint(cs, address, size, MEMTXATTRS_UNSPECIFIED,
-                             wp_access, retaddr);
+        cpu_check_watchpoint(cs, first, last - first + 1,
+                             MEMTXATTRS_UNSPECIFIED, wp_access, retaddr);
 
         raise_mmu_exception(env, address, access_type, pmp_pma_violation,
                             first_stage_error, two_stage_lookup,
-- 
2.43.0
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