[RFC PATCH 00/18] accel/tcg: Change tlb_fill/probe_access to (addr, first, last) tuple
Richard Henderson <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
The driver for this RFC is https://lore.kernel.org/qemu-devel/[email protected]/ Based-on: [email protected] ("[PATCH 00/23] target/riscv: Reorg vector load/store") But also merged to master, so for avoidance of doubt: https://gitlab.com/rth7680/qemu/-/commits/tcg-probe Convert probe_access_full, probe_access_flags, and the backend tlb_fill hooks, but not (yet) probe_access itself. I'm less certain about that, since its uses are (1) less complicated and (2) there's also a path, which I can't prove isn't used but neither can I find, which avoids both watchpoints and notdirty pages. I've tweaked the riscv pmp check to use the new parameters. The similar Armv8-M code is a bit more complicated to push through, and I need to study it a bit more. Thoughts? r~ Richard Henderson (18): target/arm: Imply probe from allocation_tag_mem_probe target/arm: Simplify invalid page test in allocation_tag_mem_internal target/arm: Return struct from allocation_tag_mem_internal target/arm: Generalize probe argument to allocation_tag_mem_internal target/arm: Probe second page earlier in allocation_tag_mem_internal accel/tcg: Drop fault_size from user-only probe_access_internal accel/tcg: Replace size with first/last in probe_access_full accel/tcg: Replace size with first/last in probe_access_flags accel/tcg: Allow phost to be NULL in probe_access_flags accel/tcg: Replace size with first/last in probe_access_internal accel/tcg: Replace size with first/last in tlb_fill_align accel/tcg: Replace size with first/last in TCGCPUOps.tlb_fill* target/riscv: Move PMP_AMATCH_OFF check in pmp_hart_has_privs target/riscv: Return bool from pmp_is_in_range target/riscv: Use boolean logic in pmp_hart_has_privs target/riscv: Recognize watchpoints with first/last target/riscv: Pass first/last to get_physical_address_pmp target/riscv: Pass first/last to pmp_hart_has_privs include/accel/tcg/cpu-ops.h | 16 +- include/accel/tcg/probe.h | 27 ++- target/alpha/cpu.h | 2 +- target/arm/internals.h | 5 +- target/arm/tcg/mte_helper.h | 18 +- target/avr/cpu.h | 2 +- target/hppa/cpu.h | 5 +- target/i386/tcg/helper-tcg.h | 2 +- target/loongarch/tcg/tcg_loongarch.h | 2 +- target/m68k/cpu.h | 2 +- target/microblaze/cpu.h | 2 +- target/mips/tcg/tcg-internal.h | 2 +- target/or1k/cpu.h | 2 +- target/ppc/internal.h | 2 +- target/riscv/cpu.h | 2 +- target/riscv/tcg/pmp.h | 5 +- target/s390x/s390x-internal.h | 2 +- target/sh4/cpu.h | 2 +- target/sparc/cpu.h | 2 +- target/tricore/cpu.h | 2 +- target/xtensa/cpu.h | 2 +- accel/tcg/cputlb.c | 91 +++++---- accel/tcg/user-exec.c | 20 +- semihosting/uaccess.c | 10 +- target/alpha/helper.c | 2 +- target/arm/gdbstub64.c | 10 +- target/arm/tcg/helper-a64.c | 5 +- target/arm/tcg/mte_helper.c | 273 +++++++++++++++++---------- target/arm/tcg/sve_helper.c | 10 +- target/arm/tcg/tlb_helper.c | 5 +- target/avr/helper.c | 2 +- target/hexagon/cpu.c | 8 +- target/hppa/mem_helper.c | 6 +- target/i386/tcg/system/excp_helper.c | 2 +- target/loongarch/tcg/tlb_helper.c | 3 +- target/m68k/helper.c | 3 +- target/microblaze/helper.c | 2 +- target/mips/tcg/ldst_helper.c | 4 +- target/mips/tcg/system/tlb_helper.c | 2 +- target/or1k/mmu.c | 2 +- target/ppc/mmu_helper.c | 2 +- target/riscv/tcg/cpu_helper.c | 53 +++--- target/riscv/tcg/op_helper.c | 5 +- target/riscv/tcg/pmp.c | 66 +++---- target/riscv/tcg/vector_helper.c | 21 ++- target/rx/cpu.c | 2 +- target/s390x/tcg/excp_helper.c | 2 +- target/s390x/tcg/mem_helper.c | 4 +- target/sh4/helper.c | 2 +- target/sparc/mmu_helper.c | 4 +- target/tricore/helper.c | 2 +- target/xtensa/helper.c | 2 +- 52 files changed, 412 insertions(+), 319 deletions(-) -- 2.43.0