Re: [PATCH v8 02/10] hw/misc: add RISC-V RPMI transport and Base support

Sunil,

On Mon, Aug 17, 2026 at 12:23 PM Sunil V L <[email protected]> wrote:
>
> On Fri, Aug 14, 2026 at 10:25 AM Subrahmanya Lingappa
> <[email protected]> wrote:
> >
> > RPMI (RISC-V Platform Management Interface) is the RISC-V non-ISA
> > platform management specification. It defines a shared-memory transport,
> > message protocol, and service groups for platform management.
> >
> > Add the QEMU transport backend and Base service plumbing for virt using
> > librpmi.
> >
> > This implementation targets the RISC-V Platform Management Interface
> > (RPMI) Specification v1.0 Ratified:
> >
> > https://github.com/riscv-non-isa/riscv-rpmi/releases/download/v1.0/riscv-rpmi.pdf
> >
> > The librpmi backend is maintained at:
> >
> > https://github.com/riscv-software-src/librpmi
> >
> > Signed-off-by: Subrahmanya Lingappa <[email protected]>
> > ---
> >  MAINTAINERS                   |   2 +
> >  hw/misc/Kconfig               |   4 +
> >  hw/misc/meson.build           |   3 +
> >  hw/misc/riscv_rpmi.c          | 477 ++++++++++++++++++++++++++++++++++
> >  hw/misc/riscv_rpmi_internal.h |  24 ++
> >  include/hw/misc/riscv_rpmi.h  |  90 +++++++
> >  6 files changed, 600 insertions(+)
> >  create mode 100644 hw/misc/riscv_rpmi.c
> >  create mode 100644 hw/misc/riscv_rpmi_internal.h
> >  create mode 100644 include/hw/misc/riscv_rpmi.h
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 93df53d87f..8e91a31757 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -359,6 +359,8 @@ F: target/riscv/
> >  F: hw/char/riscv_htif.c
> >  F: hw/riscv/
> >  F: hw/intc/riscv*
> > +F: hw/misc/riscv_rpmi*
> > +F: include/hw/misc/riscv_rpmi.h
> >  F: include/hw/char/riscv_htif.h
> >  F: include/hw/riscv/
> >  F: common-user/host/riscv*
> > diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig
> > index 1543ee6653..998944c342 100644
> > --- a/hw/misc/Kconfig
> > +++ b/hw/misc/Kconfig
> > @@ -258,3 +258,7 @@ config XLNX_ZYNQ_DDRC
> >      bool
> >
> >  source macio/Kconfig
> > +
> > +config RISCV_RPMI
> > +    bool
> > +    depends on LIBRPMI
> > diff --git a/hw/misc/meson.build b/hw/misc/meson.build
> > index 23265f6035..e7c2ebe28f 100644
> > --- a/hw/misc/meson.build
> > +++ b/hw/misc/meson.build
> > @@ -168,3 +168,6 @@ system_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
> >
> >  # HPPA devices
> >  system_ss.add(when: 'CONFIG_LASI', if_true: files('lasi.c'))
> >
> NIT: A blank line here would be better.
>
> > +system_ss.add(when: 'CONFIG_RISCV_RPMI', if_true: [files(
> > +  'riscv_rpmi.c',
> > +), librpmi])
> > diff --git a/hw/misc/riscv_rpmi.c b/hw/misc/riscv_rpmi.c
> > new file mode 100644
> > index 0000000000..54a790fc7c
> > --- /dev/null
> > +++ b/hw/misc/riscv_rpmi.c
> > @@ -0,0 +1,477 @@
> > +/*
> > + * SPDX-License-Identifier: GPL-2.0-or-later
> > + *
> > + * RISC-V RPMI transport device.
> > + *
> > + * Copyright (c) 2026 Qualcomm Technologies, Inc.
> > + * Author:
> > + *  Subrahmanya Lingappa <[email protected]>
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qapi/error.h"
> > +#include "qemu/log.h"
> > +#include "qemu/module.h"
> > +#include "exec/cpu-common.h"
> > +#include "hw/core/qdev-properties.h"
> > +#include "hw/misc/riscv_rpmi.h"
> > +#include "hw/misc/riscv_rpmi_internal.h"
> > +#include "migration/vmstate.h"
> > +#include "system/address-spaces.h"
> > +#include "system/runstate.h"
> > +#include "librpmi.h"
> > +#include "librpmi_env.h"
> > +
> > +void *rpmi_env_zalloc(rpmi_size_t size)
> > +{
> > +    return g_malloc0(size);
> > +}
> > +
> > +void rpmi_env_free(void *ptr)
> > +{
> > +    g_free(ptr);
> > +}
> > +
> > +void rpmi_env_writel(rpmi_uint64_t addr, rpmi_uint32_t val)
> > +{
> > +    cpu_physical_memory_write(addr, &val, sizeof(val));
> > +}
> >
> These cpu_physical_memory_*() interfaces are renamed, right?
>

  Thanks, fixed. I added the blank line in hw/misc/meson.build and replaced
  the old cpu_physical_memory_*() calls with physical_memory_read/write()
  in the latest version.

Thanks,


> Thanks,
> Sunil