[PATCH 0/2] target/riscv: Handle [ms]status updates for rv128
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
From: Frédéric Pétrot <[email protected]> Correct sstatus update and allow support for rv128 in mstatus, provided the cpu is an rv128. Changes compared to v1: - add cover letter - add the Reviewed-by tags Frédéric Pétrot (2): target/riscv: Fix sstatus update in rv128 target/riscv: Allow UXL to be 3 in mstatus on rv128 target/riscv/tcg/csr.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.43.0