Re: [PATCH 0/2] target/riscv: Handle [ms]status updates for rv128
Alistair Francis <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
On Wed, 2026-08-19 at 12:56 +0200, [email protected] wrote: > From: Frédéric Pétrot <[email protected]> > > Correct sstatus update and allow support for rv128 in mstatus, > provided the cpu is an rv128. > > Changes compared to v1: > - add cover letter > - add the Reviewed-by tags > > Frédéric Pétrot (2): > target/riscv: Fix sstatus update in rv128 > target/riscv: Allow UXL to be 3 in mstatus on rv128 Thanks! Applied to riscv-to-apply.next Alistair > > target/riscv/tcg/csr.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-)