[PATCH 0/2] tests/tcg/riscv64: Add vector load and store tests

Hi Richard, I was testing your riscv vector load/store series and
noticed there were some regressions with page crossing loads and stores.
We don't have any tests for that in the tree, so I wrote some.

The tests trigger assertions in linux-user for me:

  $ make -C build/tests/tcg/riscv64-linux-user run-test-rvv-ldst
  make: Entering directory 'build/tests/tcg/riscv64-linux-user'
    TEST    test-rvv-ldst on riscv64
  **
  ERROR:../accel/tcg/user-exec.c:810:probe_access: assertion failed: (-(addr | TARGET_PAGE_MASK) >= size)
  timeout: the monitored command dumped core
  Aborted
  make: *** [Makefile:223: run-test-rvv-ldst] Error 134
  make: Leaving directory 'build/tests/tcg/riscv64-linux-user'

I wrote the assembly one first before realising a C version would be
easy enough to do too. I'm not sure about using memcmp to check (in case
it's vectorised) so perhaps that's where the asm wins. I can tidy them
up and send the preferred version if we decide to put it in the tree.

Joel Stanley (2):
  tests/tcg/riscv64: Vector load test
  tests/tcg/riscv64: Add intrinsics version of test-rvv-ldst

 tests/tcg/riscv64/test-rvv-ldst-intrinsics.c |  66 ++++++++++
 tests/tcg/riscv64/Makefile.target            |  19 +++
 tests/tcg/riscv64/test-rvv-ldst.S            | 131 +++++++++++++++++++
 3 files changed, 216 insertions(+)
 create mode 100644 tests/tcg/riscv64/test-rvv-ldst-intrinsics.c
 create mode 100644 tests/tcg/riscv64/test-rvv-ldst.S

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2.53.0