Re: [PATCH 0/2] target/riscv: Handle [ms]status updates for rv128
Frédéric Pétrot <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
Hi Phil, I'll send a asap patch with the test cases. Frédéric On 8/19/26 13:17, Philippe Mathieu-Daudé wrote: > Hi Frédéric, > > On 19/8/26 12:56, [email protected] wrote: >> From: Frédéric Pétrot <[email protected]> >> >> Correct sstatus update and allow support for rv128 in mstatus, >> provided the cpu is an rv128. >> >> Changes compared to v1: >> - add cover letter >> - add the Reviewed-by tags >> >> Frédéric Pétrot (2): >> target/riscv: Fix sstatus update in rv128 >> target/riscv: Allow UXL to be 3 in mstatus on rv128 > > How can we test this series? > > > > > -- +---------------------------------------------------------------------------+ | Frédéric Pétrot, Pr. Grenoble INP-UGA@Ensimag/TIMA | | Mob/Pho: +33 6 74 57 99 65/+33 4 76 57 48 70 Ad augusta per angusta | | http://tima.univ-grenoble-alpes.fr [email protected] | +---------------------------------------------------------------------------+