[PATCH 3/4] hw/arm/strongarm: Fix dropped upper byte of ssi transfer
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-arm,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
From: Portia Stephens <[email protected]> The strongarm model intends to transfer a 16-bit value over SSI. There is no machine using this model with a peripheral attached so it is impossible to know what the intended SSI peripheral is. There is no in-tree peripheral support for 16-bit transfer, update to use 8-bit transfer. Signed-off-by: Portia Stephens <[email protected]> --- hw/arm/strongarm.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index e400f0a185..2df895c75b 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -1512,11 +1512,14 @@ static void strongarm_ssp_write(void *opaque, hwaddr addr, * there directly to the slave, no need to buffer it. */ if (s->sscr[0] & SSCR0_SSE) { - uint32_t readval; + uint32_t readval = 0; if (s->sscr[1] & SSCR1_LBM) { readval = value; } else { - readval = ssi_transfer8(s->bus, value); + if (SSCR0_DSS(s->sscr[0]) > 8) { + readval |= ssi_transfer8(s->bus, (value >> 8) & 0xff) << 8; + } + readval |= ssi_transfer8(s->bus, value & 0xff); } if (s->rx_level < 0x08) { -- 2.43.0